On 19 January 2018 at 04:54, Richard Henderson
<richard.hender...@linaro.org> wrote:
> I believe that this addresses all of the comments Peter had with
> respect to v1. I did go ahead and add the system registers, so that
> I could figure out how they're supposed to work.
>
> This has been rebased to master so that it has no dependencies.
>
>
> r~
>
>
> Richard Henderson (16):
> 1 target/arm: Mark disas_set_insn_syndrome inline
> 2 target/arm: Use pointers in crypto helpers
> 3 target/arm: Use pointers in neon zip/uzp helpers
> 4 target/arm: Use pointers in neon tbl helper
> 5 target/arm: Change the type of vfp.regs
> 6 target/arm: Add aa{32,64}_vfp_{dreg,qreg} helpers
> 7 vmstate: Add VMSTATE_UINT64_SUB_ARRAY
> 8 target/arm: Expand vector registers for SVE
> 9 target/arm: Add predicate registers for SVE
> 10 target/arm: Add ARM_FEATURE_SVE
> 11 target/arm: Add SVE to migration state
> 12 target/arm: Add ZCR_ELx
> 13 target/arm: Move cpu_get_tb_cpu_state out of line
> 14 target/arm: Hoist store to flags output in cpu_get_tb_cpu_state
> 15 target/arm: Simplify fp_exception_el for user-only
> 16 target/arm: Add SVE state to TB->FLAGS
In the interests of reducing the size of this patch set, I'm going to
take patches 1..7, 10, 13..15 into target-arm.next. (Alex, I know
you had a nit about changing the type of a variable in patch 4 but
I think I'd rather just take the patchset rather than do another
round with it for that.)
The target-arm.next branch (which rebases!) with those patches is at:
https://git.linaro.org/people/peter.maydell/qemu-arm.git target-arm.next
I expect I'll make a pullreq either tomorrow or more likely Thursday.
thanks
-- PMM
