On 01/12/2018 04:43 PM, Laurent Vivier wrote:
> index 1aadc622db..efe2bf90ee 100644
> --- a/target/m68k/qregs.def
> +++ b/target/m68k/qregs.def
> @@ -1,5 +1,7 @@
> DEFO32(PC, pc)
> DEFO32(SR, sr)
> +DEFO32(DFC, dfc)
> +DEFO32(SFC, sfc)
These are unused. No need to define or initialize.
> #if defined(CONFIG_SOFTMMU)
> +DISAS_INSN(moves)
> +{
> + int opsize;
> + uint16_t ext;
> + TCGv reg;
> + TCGv addr;
> + int extend;
> +
> + if (IS_USER(s)) {
> + gen_exception(s, s->insn_pc, EXCP_PRIVILEGE);
> + return;
> + }
> +
> + ext = read_im16(env, s);
> +
> + opsize = insn_opsize(insn);
> +
> + if (ext & 0x8000) {
> + /* address register */
> + reg = AREG(ext, 12);
> + extend = 1;
> + } else {
> + /* data register */
> + reg = DREG(ext, 12);
> + extend = 0;
> + }
> +
> + addr = gen_lea(env, s, insn, opsize);
> + if (IS_NULL_QREG(addr)) {
> + gen_addr_fault(s);
> + return;
> + }
> +
> + if (ext & 0x0800) {
> + /* from reg to ea */
> + gen_store(s, opsize, addr, reg, DFC_INDEX(s));
> + } else {
> + /* from ea to reg */
> + TCGv tmp = gen_load(s, opsize, addr, 0, SFC_INDEX(s));
> + if (extend) {
> + gen_ext(reg, tmp, opsize, 1);
> + } else {
> + gen_partset_reg(opsize, reg, tmp);
> + }
> + }
> + switch (extract32(insn, 3, 3)) {
> + case 3: /* Indirect postincrement. */
> + tcg_gen_addi_i32(AREG(insn, 0), addr,
> + REG(insn, 0) == 7 && opsize == OS_BYTE
> + ? 2
> + : opsize_bytes(opsize));
> + break;
> + case 4: /* Indirect predecrememnt. */
> + tcg_gen_mov_i32(AREG(insn, 0), addr);
> + break;
> + }
> +}
Looks ok.
> - dc->user = (env->sr & SR_S) == 0;
> +#if defined(CONFIG_SOFTMMU)
> + dc->user = (env->sr & SR_S) == 0 ? M68K_USER_FROM_MSR : 0;
> + dc->user |= (env->sfc & 4) == 0 ? M68K_USER_FROM_SFC : 0;
> + dc->user |= (env->dfc & 4) == 0 ? M68K_USER_FROM_DFC : 0;
> +#endif
Really you should be extracting these from tb->flags.
You also need to end the TB when assigning to SFC and DFC. Otherwise the
generated code is not in sync with the register contents.
r~
