Add a dma property allowing machine creation to provide the address-space
sdhci dma operates on.
[based on a patch from Alistair Francis <alistair.fran...@xilinx.com>
from qemu/xilinx tag xilinx-v2016.1]
Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org>
Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com>
---
include/hw/sd/sdhci.h | 2 ++
hw/sd/sdhci.c | 36 +++++++++++++++++++++++-------------
2 files changed, 25 insertions(+), 13 deletions(-)
diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h
index 442e30aff2..6117004949 100644
--- a/include/hw/sd/sdhci.h
+++ b/include/hw/sd/sdhci.h
@@ -41,6 +41,8 @@ typedef struct SDHCIState {
/*< public >*/
SDBus sdbus;
MemoryRegion iomem;
+ MemoryRegion *dma_mr;
+ AddressSpace dma_as;
QEMUTimer *insert_timer; /* timer for 'changing' sd card. */
QEMUTimer *transfer_timer;
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index c86c2571b7..7a2901ae4a 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -495,7 +495,7 @@ static void sdhci_sdma_transfer_multi_blocks(SDHCIState *s)
s->blkcnt--;
}
}
- dma_memory_write(&address_space_memory, s->sdmasysad,
+ dma_memory_write(&s->dma_as, s->sdmasysad,
&s->fifo_buffer[begin], s->data_count - begin);
s->sdmasysad += s->data_count - begin;
if (s->data_count == block_size) {
@@ -517,7 +517,7 @@ static void sdhci_sdma_transfer_multi_blocks(SDHCIState *s)
s->data_count = block_size;
boundary_count -= block_size - begin;
}
- dma_memory_read(&address_space_memory, s->sdmasysad,
+ dma_memory_read(&s->dma_as, s->sdmasysad,
&s->fifo_buffer[begin], s->data_count - begin);
s->sdmasysad += s->data_count - begin;
if (s->data_count == block_size) {
@@ -555,11 +555,9 @@ static void sdhci_sdma_transfer_single_block(SDHCIState *s)
for (n = 0; n < datacnt; n++) {
s->fifo_buffer[n] = sdbus_read_data(&s->sdbus);
}
- dma_memory_write(&address_space_memory, s->sdmasysad, s->fifo_buffer,
- datacnt);
+ dma_memory_write(&s->dma_as, s->sdmasysad, s->fifo_buffer, datacnt);
} else {
- dma_memory_read(&address_space_memory, s->sdmasysad, s->fifo_buffer,
- datacnt);
+ dma_memory_read(&s->dma_as, s->sdmasysad, s->fifo_buffer, datacnt);
for (n = 0; n < datacnt; n++) {
sdbus_write_data(&s->sdbus, s->fifo_buffer[n]);
}
@@ -583,7 +581,7 @@ static void get_adma_description(SDHCIState *s, ADMADescr
*dscr)
hwaddr entry_addr = (hwaddr)s->admasysaddr;
switch (SDHC_DMA_TYPE(s->hostctl)) {
case SDHC_CTRL_ADMA2_32:
- dma_memory_read(&address_space_memory, entry_addr, (uint8_t *)&adma2,
+ dma_memory_read(&s->dma_as, entry_addr, (uint8_t *)&adma2,
sizeof(adma2));
adma2 = le64_to_cpu(adma2);
/* The spec does not specify endianness of descriptor table.
@@ -595,7 +593,7 @@ static void get_adma_description(SDHCIState *s, ADMADescr
*dscr)
dscr->incr = 8;
break;
case SDHC_CTRL_ADMA1_32:
- dma_memory_read(&address_space_memory, entry_addr, (uint8_t *)&adma1,
+ dma_memory_read(&s->dma_as, entry_addr, (uint8_t *)&adma1,
sizeof(adma1));
adma1 = le32_to_cpu(adma1);
dscr->addr = (hwaddr)(adma1 & 0xFFFFF000);
@@ -608,12 +606,12 @@ static void get_adma_description(SDHCIState *s, ADMADescr
*dscr)
}
break;
case SDHC_CTRL_ADMA2_64:
- dma_memory_read(&address_space_memory, entry_addr,
+ dma_memory_read(&s->dma_as, entry_addr,
(uint8_t *)(&dscr->attr), 1);
- dma_memory_read(&address_space_memory, entry_addr + 2,
+ dma_memory_read(&s->dma_as, entry_addr + 2,
(uint8_t *)(&dscr->length), 2);
dscr->length = le16_to_cpu(dscr->length);
- dma_memory_read(&address_space_memory, entry_addr + 4,
+ dma_memory_read(&s->dma_as, entry_addr + 4,
(uint8_t *)(&dscr->addr), 8);
dscr->attr = le64_to_cpu(dscr->attr);
dscr->attr &= 0xfffffff8;
@@ -672,7 +670,7 @@ static void sdhci_do_adma(SDHCIState *s)
s->data_count = block_size;
length -= block_size - begin;
}
- dma_memory_write(&address_space_memory, dscr.addr,
+ dma_memory_write(&s->dma_as, dscr.addr,
&s->fifo_buffer[begin],
s->data_count - begin);
dscr.addr += s->data_count - begin;
@@ -696,7 +694,7 @@ static void sdhci_do_adma(SDHCIState *s)
s->data_count = block_size;
length -= block_size - begin;
}
- dma_memory_read(&address_space_memory, dscr.addr,
+ dma_memory_read(&s->dma_as, dscr.addr,
&s->fifo_buffer[begin],
s->data_count - begin);
dscr.addr += s->data_count - begin;
@@ -1191,10 +1189,20 @@ static void sdhci_common_realize(SDHCIState *s, Error
**errp)
memory_region_init_io(&s->iomem, OBJECT(s), &sdhci_mmio_ops, s, "sdhci",
SDHC_REGISTERS_MAP_SIZE);
+
+ /* use system_memory() if property "dma" not set */
+ address_space_init(&s->dma_as,
+ s->dma_mr ? s->dma_mr : get_system_memory(),
+ "sdhci-dma");
}
static void sdhci_common_unrealize(SDHCIState *s, Error **errp)
{
+ if (s->dma_mr) {
+ address_space_destroy(&s->dma_as);
+ object_unparent(OBJECT(&s->dma_mr));
+ }
+
/* This function is expected to be called only once for each class:
* - SysBus: via DeviceClass->unrealize(),
* - PCI: via PCIDeviceClass->exit().
@@ -1279,6 +1287,8 @@ static Property sdhci_properties[] = {
DEFINE_PROP_UINT64("maxcurr", SDHCIState, maxcurr, 0),
DEFINE_PROP_BOOL("pending-insert-quirk", SDHCIState, pending_insert_quirk,
false),
+ DEFINE_PROP_LINK("dma", SDHCIState, dma_mr,
+ TYPE_MEMORY_REGION, MemoryRegion *),
DEFINE_PROP_END_OF_LIST(),
};
--
2.15.1
