On Tue, Jan 2, 2018 at 4:44 PM, Michael Clark <m...@sifive.com> wrote: > Define RISC-V ELF machine EM_RISCV 243 > > Signed-off-by: Michael Clark <m...@sifive.com>
Reviewed-by: Alistair Francis <alistair.fran...@xilinx.com> Alistair > --- > include/elf.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/include/elf.h b/include/elf.h > index e8a515c..8e457fc 100644 > --- a/include/elf.h > +++ b/include/elf.h > @@ -112,6 +112,8 @@ typedef int64_t Elf64_Sxword; > > #define EM_UNICORE32 110 /* UniCore32 */ > > +#define EM_RISCV 243 /* RISC-V */ > + > /* > * This is an interim value that we will use until the committee comes > * up with a final number. > -- > 2.7.0 > >
