Hi Hervé, On 01/06/2018 12:37 PM, Hervé Poussineau wrote: > Remove i8042 instanciated in malta board, to not have it twice.
Even if this works, I'm not 100% sure this is correct, since the Malta board uses the i8042 from the FDC37M817 superio, not from the PIIX4E southbridge. I think the problem is this is unclear which PIIX4 is modelled in QEMU. Apparently this code comes from the i440fx which southbridge companion is the PIIX3 (what Virtual PC 2007 uses?). If so, we should model the 2 devices (PIIX3 + PIIX4E for Malta). > > Acked-by: Michael S. Tsirkin <m...@redhat.com> > Acked-by: Paolo Bonzini <pbonz...@redhat.com> > Signed-off-by: Hervé Poussineau <hpous...@reactos.org> > --- > hw/isa/piix4.c | 3 +++ > hw/mips/mips_malta.c | 2 -- > 2 files changed, 3 insertions(+), 2 deletions(-) > > diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c > index 3f59750e5a..1aab78cdd2 100644 > --- a/hw/isa/piix4.c > +++ b/hw/isa/piix4.c > @@ -169,6 +169,9 @@ static void piix4_realize(PCIDevice *pci_dev, Error > **errp) > /* DMA */ > DMA_init(isa_bus, 0); > > + /* Super I/O */ > + isa_create_simple(isa_bus, "i8042"); > + > piix4_dev = pci_dev; > qemu_register_reset(piix4_reset, s); > } > diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c > index afe13c684f..7498fad006 100644 > --- a/hw/mips/mips_malta.c > +++ b/hw/mips/mips_malta.c > @@ -1204,8 +1204,6 @@ void mips_malta_init(MachineState *machine) > g_free(smbus_eeprom_buf); > > /* Super I/O */ > - isa_create_simple(isa_bus, "i8042"); > - > mc146818_rtc_init(isa_bus, 2000, NULL); > serial_hds_isa_init(isa_bus, 0, 2); > parallel_hds_isa_init(isa_bus, 1); >
