On Thu, Jan 4, 2018 at 12:47 PM, Richard Henderson <
richard.hender...@linaro.org> wrote:
> On 01/02/2018 04:44 PM, Michael Clark wrote:
> > diff --git a/linux-user/elfload.c b/linux-user/elfload.c
> > index 20f3d8c..178af56 100644
> > --- a/linux-user/elfload.c
> > +++ b/linux-user/elfload.c
> > @@ -1272,6 +1272,28 @@ static inline void init_thread(struct
> target_pt_regs *regs,
> >
> > #endif /* TARGET_TILEGX */
> >
> > +#ifdef TARGET_RISCV
> > +
> > +#define ELF_START_MMAP 0x80000000
>
> For riscv64 too? Surely closer to ((TASK_SIZE / 3) * 2).
>
> > diff --git a/linux-user/main.c b/linux-user/main.c
> > index 71696ed..8900141 100644
> > --- a/linux-user/main.c
> > +++ b/linux-user/main.c
> > @@ -227,7 +227,7 @@ void cpu_loop(CPUX86State *env)
> > cpu_exec_end(cs);
> > process_queued_cpu_work(cs);
> >
> > - switch(trapnr) {
> > + switch (trapnr) {
>
> Even though the formatting is wrong, don't change unrelated code.
I didn't intend for this to happen. False assumption that only the RISC-V
code was broken. Will attend to this in the next spin.
> > + case EXCP_DEBUG:
> > + gdbstep:
> > + signum = gdb_handlesig(cs, TARGET_SIGTRAP);
> > + sigcode = TARGET_TRAP_BRKPT;
> > + break;
> > + default:
> > + EXCP_DUMP(env, "\nqemu: unhandled CPU exception %#x -
> aborting\n",
> > + trapnr);
> > + exit(EXIT_FAILURE);
>
> You will need to handle the generic EXCP_ATOMIC as well.
> Though of course you won't see that until you use tcg_gen_atomic_*.
>
