On Tue, Dec 12, 2017 at 9:40 AM, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 11 December 2017 at 21:29, Andrey Smirnov <andrew.smir...@gmail.com> wrote: >> Hi everyone, >> >> This patchset is a spin-off from original i.MX7 support submission >> found here [1], containing all of the patchest that are more or less >> agreed upon and are ready (hopefully!) for inclusion. >> >> Changes since [1]: >> >> - Rx buffer in FEC was moved from stack to heap to allow >> worry-free expansion to 16K limit. >> >> - Added more comments explaining rather convoluted bit-moving >> in eSHDC emuation code >> >> - Triple Tx ring DMA "VMState" code was changed to follow >> Peter's recommendations (avoiding the need to incrememnt the >> version_id) >> >> - FSL_IMX25_FEC_SIZE is used as a size of FEC's register file >> >> - Removed leftover code from "imx_fec: Change queue flushing >> heuristics" >> >> [1] https://lists.gnu.org/archive/html/qemu-arm/2017-11/msg00045.html > > Hi; thanks for sending this set separately. Patch 4 ("Move Tx frame buffer > away from the stack") seems to have got lost -- it isn't in the mailing > list archives or my mailbox. Could you try resending that one? >
My bad, I forgot to add correct Cc tags to that one. I am a bit surprised it's not in the archive since it did have correct To: info, but it doesn't matter. I'll make sure this patch is sent out in v2. > Incidentally we should use the new i.MX SDHCI controller in the > imx6: coincidentally somebody ran into this bug recently: > https://stackoverflow.com/questions/47538951/qemu-freescale-i-mx6-duallite-sabre-root-filesystem-does-not-mount/47552596 > > I'll retest that this patchset works with my imx6 image, and > send a patch to sit on top of it to switch imx6 over to TYPE_IMX_USDHC. > Out of curiosity, I gave emulating SD on i.MX6 a try and it mostly worked (there were other unrelated to SD problems). I'll include what I came up with and we can go from there. Thanks, Andrey Smirnov
