The XIVE object has its own set of qirqs which is to be used when the XIVE exploitation interrupt mode is activated.
Signed-off-by: Cédric Le Goater <c...@kaod.org> --- Changes since v1: - introduced a spapr_xive_qirq() helper hw/intc/spapr_xive.c | 12 ++++++++++++ hw/ppc/spapr.c | 4 ++++ include/hw/ppc/spapr_xive.h | 1 + 3 files changed, 17 insertions(+) diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index fcdadf727f9d..e650ed69eb70 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -980,3 +980,15 @@ void spapr_xive_mmio_map(sPAPRXive *xive) sysbus_mmio_map(SYS_BUS_DEVICE(xive), 1, xive->tm_base); sysbus_mmio_map(SYS_BUS_DEVICE(xive), 2, xive->tm_base + (1 << TM_SHIFT)); } + +qemu_irq spapr_xive_qirq(sPAPRXive *xive, int lisn) +{ + XiveIVE *ive = spapr_xive_get_ive(xive, lisn); + + if (!ive || !(ive->w & IVE_VALID)) { + qemu_log_mask(LOG_GUEST_ERROR, "XIVE: invalid LISN %d\n", lisn); + return NULL; + } + + return xive->qirqs[lisn]; +} diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 73df038a9e8b..d117fbd5ce9d 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -3810,6 +3810,10 @@ qemu_irq spapr_qirq(sPAPRMachineState *spapr, int irq) { ICSState *ics = spapr->ics; + if (spapr_ovec_test(spapr->ov5_cas, OV5_XIVE_EXPLOIT)) { + return spapr_xive_qirq(spapr->xive, irq); + } + if (ics_valid_irq(ics, irq)) { return ics->qirqs[irq - ics->offset]; } diff --git a/include/hw/ppc/spapr_xive.h b/include/hw/ppc/spapr_xive.h index 5d0c178a4984..8eefb09999de 100644 --- a/include/hw/ppc/spapr_xive.h +++ b/include/hw/ppc/spapr_xive.h @@ -60,6 +60,7 @@ bool spapr_xive_irq_disable(sPAPRXive *xive, uint32_t lisn); void spapr_xive_pic_print_info(sPAPRXive *xive, Monitor *mon); void spapr_xive_nvt_pic_print_info(sPAPRXiveNVT *nvt, Monitor *mon); void spapr_xive_mmio_map(sPAPRXive *xive); +qemu_irq spapr_xive_qirq(sPAPRXive *xive, int lisn); typedef struct sPAPRMachineState sPAPRMachineState; -- 2.13.6