On 11/21/2017 10:08 PM, David Gibson wrote: > On Sun, Nov 19, 2017 at 09:24:16PM -0600, Michael Davidsaver wrote: >> Signed-off-by: Michael Davidsaver <mdavidsa...@gmail.com> > > You're adding what seems to be a fairly specific device to the general > e500 init - this again suggests that it should be split, putting > creation of devices under control of individual machines.
I'll address the ppce500_init() part of this question separately.
In addition to the MPC8540, I find that documentation for the MPC8544
(modeled) and P2020 (un-modeled) show the same i2c controller registers.
So I think it's reasonable for the generic ppce500 machine to have it
as well.
For what it's worth, the Linux driver for this unit
(drivers/i2c/busses/i2c-mpc.c) lists compatibility with a number of
other freescale SoCs with only some differences in clock selection (not
modeled). The description for the module is:
> MODULE_DESCRIPTION("I2C-Bus adapter for MPC107 bridge and "
> "MPC824x/83xx/85xx/86xx/512x/52xx processors");
>> ---
>> hw/ppc/e500.c | 8 ++++++++
>> 1 file changed, 8 insertions(+)
>>
>> diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
>> index 6f77844303..bef7d313d4 100644
>> --- a/hw/ppc/e500.c
>> +++ b/hw/ppc/e500.c
>> @@ -861,6 +861,14 @@ void ppce500_init(MachineState *machine, PPCE500Params
>> *params)
>> qdev_init_nofail(dev);
>> ccsr_addr_space = sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0);
>>
>> + dev = qdev_create(NULL, "mpc8540-i2c");
>> + object_property_add_child(qdev_get_machine(), "i2c[*]",
>> + OBJECT(dev), NULL);
>> + qdev_init_nofail(dev);
>> + s = SYS_BUS_DEVICE(dev);
>> + memory_region_add_subregion(ccsr_addr_space, 0x3000,
>> + sysbus_mmio_get_region(s, 0));
>> +
>> mpicdev = ppce500_init_mpic(machine, params, ccsr_addr_space, irqs);
>>
>> /* Serial */
>
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