Peter Maydell writes: > On 15 October 2017 at 17:30, Lluís Vilanova <vilan...@ac.upc.edu> wrote: >> Thinking about it, shouldn't this always be the same given QEMU's TLB/page >> table >> consistency assurances?
> What TLB/page table consistency assurances? For ARM at least > we will only update (ie flush) the TLB when the guest next > executes a relevant TLB maintenance instruction. So a > misbehaving guest can set things up so the page table > is completely different from what's in QEMU's TLB if it > wants. This all falls in the realms of architecturally > unpredictable behaviour for the guest -- whether you > want the instrumentation to be confused as well is a > different question... I meant that if the contents of a virtual memory page change while QEMU is translating an instruction, it must be able to detect that and act accordingly for correctness. Having that in mind, the same should hold true when an instrumentor reads a page's contents during translation (e.g., to gather information on opcodes). Cheers, Lluis
