On Thu, Oct 19, 2017 at 02:23:04PM +0200, Paolo Bonzini wrote: > On 19/10/2017 13:49, David Gibson wrote: > > Note that describing socket/core/thread tuples as arch independent (or > > even machine independent) is.. debatable. I mean it's flexible enough > > that most platforms can be fit to that scheme without too much > > straining. But, there's no arch independent way of defining what each > > level means in terms of its properties. > > > > So, for example, on spapr - being paravirt - there's no real > > distinction between cores and sockets, how you divide them up is > > completely arbitrary. > > Same on x86, actually. > > It's _common_ that cores on the same socket share L3 cache and that a > socket spans an integer number of NUMA nodes, but it doesn't have to be > that way. > > QEMU currently enforces the former (if it tells the guest at all that > there is an L3 cache), but not the latter.
Ok. Correct me if I'm wrong, but doesn't ACPI describe the NUMA
architecture in terms of this thread/core/socket heirarchy? That's
not true for PAPR, where the NUMA topology is described in an
independent set of (potentially arbitrarily nested) nodes.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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