> The way mmio endianness is currently implemented is horrifying. Agreed.
> #ifdef TARGET_WORDS_BIGENDIAN > val = bswap32(val); > #endif > > With the move to get device code only compiled once, this has > become harder and harder to justify though, since we don't know > the target endianness during compile time. Not just that, it's wrong to start with. I've used machines with both native and cross-endian 16550 based UARTs. > So my solution to the issue is to make every device define if > it's a little, big or native (target) endianness device. This > basically tells the layers below what endianness the device > expects mmio to occur in. Little endian devices on little endian > hosts don't swap. On big endian hosts they do. Same the other > way around. > > The only reason I added "native" endianness is that we have some > PV devices like the fw_cfg that expect qemu's broken behavior. > These devices are the minority though. In the long run I'd expect > to see most code be committed with either of the two endianness > choices. I'd prefer to avoid this, or at least document it as a temporary hack that should be removed. If a device can exist in either endian, then we really want to push this decision down to the board-level code. One of the reasons I haven't bothered fixing this yet is that this feels like something that should be a device/bus property. e.g. PCI devices/busses are always little-endian[1], as as mentioned above some devices come in both flavors. I guess we can go with your approach for now, and make sure we fix this properly when we introduce bus-specific registration functions. Paul [1] Ignoring magical byteswapping cpu-pci bridges, but they're broken by design, and thankfully quite rare.
