The ARM ARM defines that if the input to a single<->double conversion
is a NaN then the output is always forced to be a quiet NaN by setting
the most significant bit of the fraction part.
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
---
target-arm/helper.c | 18 ++++++++++++++++--
1 files changed, 16 insertions(+), 2 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 72ba314..356715c 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2529,12 +2529,26 @@ float32 VFP_HELPER(tosiz, d)(float64 x, CPUState *env)
/* floating point conversion */
float64 VFP_HELPER(fcvtd, s)(float32 x, CPUState *env)
{
- return float32_to_float64(x, &env->vfp.fp_status);
+ float64 r = float32_to_float64(x, &env->vfp.fp_status);
+ /* ARM requires that S<->D conversion of any kind of NaN generates
+ * a quiet NaN by forcing the most significant frac bit to 1.
+ */
+ if (float64_is_signaling_nan(r)) {
+ return make_float64(float64_val(r) | (1LL << 51));
+ }
+ return r;
}
float32 VFP_HELPER(fcvts, d)(float64 x, CPUState *env)
{
- return float64_to_float32(x, &env->vfp.fp_status);
+ float32 r = float64_to_float32(x, &env->vfp.fp_status);
+ /* ARM requires that S<->D conversion of any kind of NaN generates
+ * a quiet NaN by forcing the most significant frac bit to 1.
+ */
+ if (float32_is_signaling_nan(r)) {
+ return make_float32(float32_val(r) | (1 << 22));
+ }
+ return r;
}
/* VFP3 fixed point conversion. */
--
1.6.3.3
