This patch cleans up command register initialization with
comments.
Signed-off-by: Isaku Yamahata <yamah...@valinux.co.jp>
---
hw/pci.c | 42 ++++++++++++++++++++++++++++++++++++++++++
1 files changed, 42 insertions(+), 0 deletions(-)
diff --git a/hw/pci.c b/hw/pci.c
index 962886e..b70a568 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -544,8 +544,50 @@ static void pci_init_wmask(PCIDevice *dev)
dev->wmask[PCI_CACHE_LINE_SIZE] = 0xff;
dev->wmask[PCI_INTERRUPT_LINE] = 0xff;
+
+ /*
+ * bit 0: PCI_COMMAND_IO
+ * type 0: if IO BAR is used, RW
+ * type 1: RW
+ * bit 1: PCI_COMMAND_MEMORY
+ * type 0: if IO BAR is used, RW
+ * type 1: RW
+ * bit 2: PCI_COMMAND_MASTER
+ * type 0: RW if bus master
+ * type 1: RW
+ * bit 3: PCI_COMMAND_SPECIAL
+ * RO=0, optionally RW: Such device should set this bit itself
+ * bit 4: PCI_COMMAND_INVALIDATE
+ * RO=0, optionally RW: Such device should set this bit itself
+ * bit 5: PCI_COMMAND_VGA_PALETTE
+ * RO=0, optionally RW: Such device should set this bit itself
+ * bit 6: PCI_COMMAND_PARITY
+ * RW with exceptions: Such device should clear this bit itself
+ * Given that qemu doesn't emulate pci bus cycles, so that there
+ * is no place to generate parity error. So just making this
+ * register RW is okay because there is no place which refers
+ * this bit.
+ * TODO: When device assignment tried to inject PERR# into qemu,
+ * some extra work would be needed.
+ * bit 7: PCI_COMMAND_WAIT: reserved (PCI 3.0)
+ * RO=0
+ * bit 8: PCI_COMMAND_SERR
+ * RW with exceptions: Such device should clear this bit itself
+ * Given that qemu doesn't emulate pci bus cycles, so that there
+ * is no place to generate system error. So just making this
+ * register RW is okay because there is no place which refers
+ * this bit.
+ * TODO: When device assignment tried to inject SERR# into qemu,
+ * some extra work would be needed.
+ * bit 9: PCI_COMMAND_FAST_BACK
+ * RO=0, optionally RW: Such device should set this bit itself
+ * bit 10: PCI_COMMAND_INTX_DISABLE
+ * RW
+ * bit 11-15: reserved
+ */
pci_set_word(dev->wmask + PCI_COMMAND,
PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
+ PCI_COMMAND_PARITY | PCI_COMMAND_SERR |
PCI_COMMAND_INTX_DISABLE);
memset(dev->wmask + PCI_CONFIG_HEADER_SIZE, 0xff,
--
1.7.1.1
