Lluís Vilanova <vilan...@ac.upc.edu> writes:
> Incrementally paves the way towards using the generic instruction translation
> loop.
>
> Signed-off-by: Lluís Vilanova <vilan...@ac.upc.edu>
> Reviewed-by: Richard Henderson <r...@twiddle.net>
Reviewed-by: Alex Bennée <alex.ben...@linaro.org>
> ---
> target/arm/translate-a64.c | 11 +++++++++--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
> index 5c04ff3d8b..dc91661df0 100644
> --- a/target/arm/translate-a64.c
> +++ b/target/arm/translate-a64.c
> @@ -11247,6 +11247,14 @@ static void
> aarch64_tr_init_disas_context(DisasContextBase *dcbase,
> init_tmp_a64_array(dc);
> }
>
> +static void aarch64_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu)
> +{
> + DisasContext *dc = container_of(dcbase, DisasContext, base);
> +
> + dc->insn_start_idx = tcg_op_buf_count();
> + tcg_gen_insn_start(dc->pc, 0, 0);
> +}
> +
> void gen_intermediate_code_a64(DisasContextBase *dcbase, CPUState *cs,
> TranslationBlock *tb)
> {
> @@ -11278,8 +11286,7 @@ void gen_intermediate_code_a64(DisasContextBase
> *dcbase, CPUState *cs,
>
> do {
> dc->base.num_insns++;
> - dc->insn_start_idx = tcg_op_buf_count();
> - tcg_gen_insn_start(dc->pc, 0, 0);
> + aarch64_tr_insn_start(&dc->base, cs);
>
> if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) {
> CPUBreakpoint *bp;
--
Alex Bennée
