Dump critical information for VT-d. Sample output:
(qemu) info iommu
Version: 1
Cap: 0x12008c22260286
Extended Cap: 0xf00f5a
DMAR: enabled, root=0x7435f000 (extended=0)
IR: enabled, root=0x17a400000, size=0x10000 (eim=1)
QI: enabled, root=0x17aadf000, head=156, tail=156, size=256
Caching-mode: enabled
Misc: next_frr=0, context_gen=2, buggy_eim=0
Signed-off-by: Peter Xu <pet...@redhat.com>
---
hw/i386/intel_iommu.c | 39 +++++++++++++++++++++++++++++++++++++++
hw/i386/x86-iommu.c | 17 +++++++++++++++++
include/hw/i386/x86-iommu.h | 5 +++++
3 files changed, 61 insertions(+)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index a5c83dd..39f772a 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -2991,6 +2991,44 @@ static bool vtd_decide_config(IntelIOMMUState *s, Error
**errp)
return true;
}
+#define DUMP(...) monitor_printf(mon, ## __VA_ARGS__)
+static void vtd_info_dump(X86IOMMUState *x86_iommu, Monitor *mon,
+ const QDict *qdict)
+{
+ IntelIOMMUState *s = INTEL_IOMMU_DEVICE(x86_iommu);
+
+ DUMP("Version: %d\n", 1);
+ DUMP("Cap: 0x%"PRIx64"\n", s->cap);
+ DUMP("Extended Cap: 0x%"PRIx64"\n", s->ecap);
+
+ DUMP("DMAR: %s", s->dmar_enabled ? "enabled" : "disabled");
+ if (s->dmar_enabled) {
+ DUMP(", root=0x%"PRIx64" (extended=%d)",
+ s->root, s->root_extended);
+ }
+ DUMP("\n");
+
+ DUMP("IR: %s", s->intr_enabled ? "enabled" : "disabled");
+ if (s->intr_enabled) {
+ DUMP(", root=0x%"PRIx64", size=0x%"PRIx32" (eim=%d)",
+ s->intr_root, s->intr_size, s->intr_eime);
+ }
+ DUMP("\n");
+
+ DUMP("QI: %s", s->qi_enabled ? "enabled" : "disabled");
+ if (s->qi_enabled) {
+ DUMP(", root=0x%"PRIx64", head=%u, tail=%u, size=%u",
+ s->iq, s->iq_head, s->iq_tail, s->iq_size);
+ }
+ DUMP("\n");
+
+ DUMP("Caching-mode: %s\n", s->caching_mode ? "enabled" : "disabled");
+ DUMP("Misc: next_frr=%d, context_gen=%d, buggy_eim=%d\n",
+ s->next_frcd_reg, s->context_cache_gen, s->buggy_eim);
+ DUMP(" iotlb_size=%d\n", g_hash_table_size(s->iotlb));
+}
+#undef DUMP
+
static void vtd_realize(DeviceState *dev, Error **errp)
{
MachineState *ms = MACHINE(qdev_get_machine());
@@ -3042,6 +3080,7 @@ static void vtd_class_init(ObjectClass *klass, void *data)
dc->hotpluggable = false;
x86_class->realize = vtd_realize;
x86_class->int_remap = vtd_int_remap;
+ x86_class->info_dump = vtd_info_dump;
/* Supported by the pc-q35-* machine types */
dc->user_creatable = true;
}
diff --git a/hw/i386/x86-iommu.c b/hw/i386/x86-iommu.c
index 293caf8..fed35b4 100644
--- a/hw/i386/x86-iommu.c
+++ b/hw/i386/x86-iommu.c
@@ -76,6 +76,23 @@ IommuType x86_iommu_get_type(void)
return x86_iommu_default->type;
}
+void arch_iommu_info(Monitor *mon, const QDict *qdict)
+{
+ X86IOMMUState *iommu = x86_iommu_get_default();
+ X86IOMMUClass *class;
+
+ if (!iommu) {
+ monitor_printf(mon, "No IOMMU is detected.\n");
+ return;
+ }
+
+ class = X86_IOMMU_GET_CLASS(iommu);
+
+ if (class->info_dump) {
+ class->info_dump(iommu, mon, qdict);
+ }
+}
+
static void x86_iommu_realize(DeviceState *dev, Error **errp)
{
X86IOMMUState *x86_iommu = X86_IOMMU_DEVICE(dev);
diff --git a/include/hw/i386/x86-iommu.h b/include/hw/i386/x86-iommu.h
index ef89c0c..c414b65 100644
--- a/include/hw/i386/x86-iommu.h
+++ b/include/hw/i386/x86-iommu.h
@@ -22,6 +22,8 @@
#include "hw/sysbus.h"
#include "hw/pci/pci.h"
+#include "hw/iommu.h"
+#include "monitor/monitor.h"
#define TYPE_X86_IOMMU_DEVICE ("x86-iommu")
#define X86_IOMMU_DEVICE(obj) \
@@ -50,6 +52,9 @@ struct X86IOMMUClass {
/* MSI-based interrupt remapping */
int (*int_remap)(X86IOMMUState *iommu, MSIMessage *src,
MSIMessage *dst, uint16_t sid);
+ /* Dump IOMMU information */
+ void (*info_dump)(X86IOMMUState *iommu, Monitor *mon,
+ const QDict *qdict);
};
/**
--
2.7.4
