Check if the CPU supports AARCH64 before adding the 64bit view of
the coprocessor's register to the cp_regs hashtable.
Signed-off-by: Abdallah Bouassida <abdallah.bouass...@lauterbach.com>
---
Bug description: if a register has the .state = ARM_CP_STATE_BOTH, its
64bit view will be added to the hashtable even if the CPU is not 64bit.
target/arm/helper.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 2594faa..7fa2889 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -5607,11 +5607,13 @@ void define_one_arm_cp_reg_with_opaque(ARMCPU *cpu,
break;
}
} else {
- /* AArch64 registers get mapped to non-secure
instance
- * of AArch32 */
- add_cpreg_to_hashtable(cpu, r, opaque, state,
- ARM_CP_SECSTATE_NS,
- crm, opc1, opc2);
+ if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) {
+ /* AArch64 registers get mapped to
non-secure instance
+ * of AArch32 */
+ add_cpreg_to_hashtable(cpu, r, opaque, state,
+ ARM_CP_SECSTATE_NS,
+ crm, opc1, opc2);
+ }
}
}
}
--
1.9.1
