Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20170303032507.16142-1-da...@gibson.dropbear.id.au
Type: series
Subject: [Qemu-devel] [PULL 00/17] ppc-for-2.9 queue 20170303
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0
# Useful git options
git config --local diff.renamelimit 0
git config --local diff.renames True
commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
failed=1
echo
fi
n=$((n+1))
done
exit $failed
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
* [new tag] patchew/20170303032507.16142-1-da...@gibson.dropbear.id.au
-> patchew/20170303032507.16142-1-da...@gibson.dropbear.id.au
Switched to a new branch 'test'
3246067 target/ppc: rewrite f[n]m[add, sub] using float64_muladd
2043060 spapr: Small cleanup of PPC MMU enums
50dc395 spapr_pci: Advertise access to PCIe extended config space
c68d6be target/ppc: Rework hash mmu page fault code and add defines for clarity
809a3f5 target/ppc: Move no-execute and guarded page checking into new function
cbddae7 target/ppc: Add execute permission checking to access authority check
5438e36 target/ppc: Add Instruction Authority Mask Register Check
8f0f27f hw/ppc/spapr: Add POWER9 to pseries cpu models
a6391c2 target/ppc/POWER9: Add cpu_has_work function for POWER9
1dfd4de target/ppc/POWER9: Add POWER9 pa-features definition
8bd6f88 target/ppc/POWER9: Add POWER9 mmu fault handler
fcbb600 target/ppc: Don't gen an SDR1 on POWER9 and rework register creation
98f9781 target/ppc: Add patb_entry to sPAPRMachineState
26b2ad3 target/ppc/POWER9: Add POWERPC_MMU_V3 bit
7b77fce powernv: Don't test POWER9 CPU yet
a076e26 exec, kvm, target-ppc: Move getrampagesize() to common code
c53f459 target/ppc: Add POWER9/ISAv3.00 to compat_table
=== OUTPUT BEGIN ===
Checking PATCH 1/17: target/ppc: Add POWER9/ISAv3.00 to compat_table...
Checking PATCH 2/17: exec, kvm, target-ppc: Move getrampagesize() to common
code...
WARNING: architecture specific defines should be avoided
#117: FILE: exec.c:1341:
+#ifdef __linux__
total: 0 errors, 1 warnings, 287 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 3/17: powernv: Don't test POWER9 CPU yet...
ERROR: if this code is redundant consider removing it
#42: FILE: tests/pnv-xscom-test.c:45:
+#if 0 /* POWER9 support is not ready yet */
total: 1 errors, 0 warnings, 25 lines checked
Your patch has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 4/17: target/ppc/POWER9: Add POWERPC_MMU_V3 bit...
Checking PATCH 5/17: target/ppc: Add patb_entry to sPAPRMachineState...
Checking PATCH 6/17: target/ppc: Don't gen an SDR1 on POWER9 and rework
register creation...
Checking PATCH 7/17: target/ppc/POWER9: Add POWER9 mmu fault handler...
Checking PATCH 8/17: target/ppc/POWER9: Add POWER9 pa-features definition...
Checking PATCH 9/17: target/ppc/POWER9: Add cpu_has_work function for POWER9...
Checking PATCH 10/17: hw/ppc/spapr: Add POWER9 to pseries cpu models...
Checking PATCH 11/17: target/ppc: Add Instruction Authority Mask Register
Check...
Checking PATCH 12/17: target/ppc: Add execute permission checking to access
authority check...
Checking PATCH 13/17: target/ppc: Move no-execute and guarded page checking
into new function...
Checking PATCH 14/17: target/ppc: Rework hash mmu page fault code and add
defines for clarity...
Checking PATCH 15/17: spapr_pci: Advertise access to PCIe extended config
space...
Checking PATCH 16/17: spapr: Small cleanup of PPC MMU enums...
Checking PATCH 17/17: target/ppc: rewrite f[n]m[add, sub] using
float64_muladd...
=== OUTPUT END ===
Test command exited with code: 1
---
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