On Mon, Feb 20, 2017 at 03:04:29PM +1100, Suraj Jitindar Singh wrote:
> POWER9 processors implement the mmu as defined in version 3.00 of the ISA.
>
> Add a definition for this mmu model and set the POWER9 cpu model to use
> this mmu model.
>
> Signed-off-by: Suraj Jitindar Singh <sjitindarsi...@gmail.com>
> ---
> target/ppc/cpu-qom.h | 5 ++++-
> target/ppc/mmu_helper.c | 2 ++
> target/ppc/translate_init.c | 3 +--
> 3 files changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h
> index b7977ba..4e3132b 100644
> --- a/target/ppc/cpu-qom.h
> +++ b/target/ppc/cpu-qom.h
> @@ -86,10 +86,13 @@ enum powerpc_mmu_t {
> POWERPC_MMU_2_07 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
> | POWERPC_MMU_64K
> | POWERPC_MMU_AMR | 0x00000004,
> - /* FIXME Add POWERPC_MMU_3_OO defines */
> /* Architecture 2.07 "degraded" (no 1T segments) */
> POWERPC_MMU_2_07a = POWERPC_MMU_64 | POWERPC_MMU_AMR
> | 0x00000004,
> + /* Architecture 3.00 variant */
> + POWERPC_MMU_3_00 = POWERPC_MMU_64 | POWERPC_MMU_1TSEG
> + | POWERPC_MMU_64K
> + | POWERPC_MMU_AMR | 0x00000005,
I wonder if we need a POWERPC_MMU_RADIX that we can then attach
with future versions
Balbir Singh.
