On 02/04/2017 01:33 PM, Peter Maydell wrote: > On 3 February 2017 at 17:06, <fred.kon...@greensocs.com> wrote: >> From: KONRAD Frederic <fred.kon...@greensocs.com> >> >> This patch-set allows to execute code from mmio areas. >> The main goal of this is to be able to run code for example from an SPI >> device. >> >> The three first patch fixes the way get_page_addr_code fills the TLB. >> >> The fourth patch implements the mmio execution helpers: the device must >> implement the request_ptr callback of the MemoryRegion and will be notified >> when >> the guest wants to execute code from it. >> >> The fifth patch implements the execution from the SPI memories in the >> xilinx_spips model. > > I like the general idea, but there's an awkward issue: > at the moment our translation system assumes that when we're > translating code then if the first instruction in the TB > can be read OK then we won't ever get a fault trying to > read subsequent bytes up to the end of the page. If we > move from "we only translate code out of whole pages of > RAM" to "we might translate code out of devices that > are in subpages" then this assumption gets broken. > (The symptom would be that we would report the fault > in the wrong place, for the PC at the start of the TB.) > > thanks > -- PMM >
Hi Peter, I think I see your point. Is that the case that we might get a Bad RAM address error or some such if we are not on a page boundary (or too small as you say)? I guess this is a limitation. Mapping on a page boundary shouldn't be too much restrictive. Thanks, Fred
