On 26 January 2017 at 17:37, Cédric Le Goater <c...@kaod.org> wrote: > Hello, > > The Aspeed SoC includes a set of watchdog timers using 32-bit > decrement counters. This patchset provides a model for this controller > and adds the first watchdog to the Aspeed SoC model. A second watchdog > exists and is used on real HW to boot from a second flash module > containing a golden image of the firmware. This is not supported yet > in qemu. > > The main benefit today of this model is to enables reboot/reset of a > guest from U-Boot and Linux. > > Thanks, > > C. > > Cédric Le Goater (2): > wdt: Add Aspeed watchdog device model > aspeed: add a watchdog controller
Applied to target-arm.next, thanks. -- PMM
