Hi Peter,
please pull the following batch of updates for target/xtensa.
The following changes since commit a470b33259bf82ef2336bfcd5d07640562d3f63b:
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
(2016-12-22 19:23:51 +0000)
are available in the git repository at:
git://github.com/OSLL/qemu-xtensa.git tags/20170124-xtensa
for you to fetch changes up to 3a3c9dc4ca2eaa612cbd5d4c85d674b15eadfb02:
target-xtensa: implement RER/WER instructions (2017-01-16 19:19:03 -0800)
----------------------------------------------------------------
target/xtensa updates:
- refactor CCOUNT/CCOMPARE (use QEMU timers instead of instruction counting);
- support icount; run target/xtensa TCG tests with icount;
- implement SMP prerequisites: static vector selection, RUNSTALL and RER/WER.
----------------------------------------------------------------
Max Filippov (14):
target/xtensa: add static vectors selection
target/xtensa: implement RUNSTALL
target/xtensa: refactor CCOUNT/CCOMPARE
target/xtensa: support icount
target/xtensa: don't continue translation after exception
target/xtensa: tests: run tests with icount
target/xtensa: tests: fix timer tests
target/xtensa: tests: replace hardcoded interrupt masks
target/xtensa: tests: add ccount write tests
target/xtensa: fix ICACHE/DCACHE options detection
target/xtensa: implement MEMCTL SR
target/xtensa: tests: add memctl test
target/xtensa: tests: clean up interrupt tests
target-xtensa: implement RER/WER instructions
hw/xtensa/pic_cpu.c | 75 +++---------
target/xtensa/cpu.c | 12 +-
target/xtensa/cpu.h | 60 ++++++++--
target/xtensa/helper.c | 13 ++
target/xtensa/helper.h | 9 +-
target/xtensa/op_helper.c | 73 ++++++++++--
target/xtensa/overlay_tool.h | 37 +++++-
target/xtensa/translate.c | 245 ++++++++++++++++++++++++++------------
tests/tcg/xtensa/Makefile | 2 +-
tests/tcg/xtensa/test_interrupt.S | 27 +++--
tests/tcg/xtensa/test_sr.S | 1 +
tests/tcg/xtensa/test_timer.S | 105 +++++++++++-----
12 files changed, 456 insertions(+), 203 deletions(-)
--
2.1.4
