Alex Bennée writes:
> This enables the multi-threaded system emulation by default for ARMv7
> and ARMv8 guests using the x86_64 TCG backend. This is because on the
> guest side:
>
> - The ARM translate.c/translate-64.c have been converted to
> - use MTTCG safe atomic primitives
> - emit the appropriate barrier ops
> - The ARM machine has been updated to
> - hold the BQL when modifying shared cross-vCPU state
> - defer cpu_reset to async safe work
>
> All the host backends support the barrier and atomic primitives but
> need to provide same-or-better support for normal load/store
> operations.
>
> Signed-off-by: Alex Bennée <alex.ben...@linaro.org>
<snip>
>
> +/* This defines the natural memory order supported by this
> + * architecture before guarantees made by various barrier
> + * instructions.
> + *
> + * The x86 has a pretty strong memory ordering which only really
> + * allows for some stores to be re-ordered after loads.
> + */
> +#include "tcg-mo.h"
> +
> +static inline int get_tcg_target_mo(void)
> +{
> + return TCG_MO_ALL & ~TCG_MO_LD_ST;
> +}
> +
Shouldn't this be TCG_MO_ALL & ~TCG_MO_ST_LD?
Thanks,
--
Pranith
