On Sat, Dec 03, 2016 at 03:00:03AM -0200, Jose Ricardo Ziviani wrote:
> bcdus.: Decimal unsigned shift. This instruction works like bcds. but
> considers only unsigned BCDs (no sign in least meaning 4 bits).
>
> Signed-off-by: Jose Ricardo Ziviani <jos...@linux.vnet.ibm.com>
> ---
> target-ppc/helper.h | 1 +
> target-ppc/int_helper.c | 43
> +++++++++++++++++++++++++++++++++++++
> target-ppc/translate/vmx-impl.inc.c | 3 +++
> target-ppc/translate/vmx-ops.inc.c | 2 +-
> 4 files changed, 48 insertions(+), 1 deletion(-)
>
> diff --git a/target-ppc/helper.h b/target-ppc/helper.h
> index 471a1da..386ea67 100644
> --- a/target-ppc/helper.h
> +++ b/target-ppc/helper.h
> @@ -393,6 +393,7 @@ DEF_HELPER_3(bcdctsq, i32, avr, avr, i32)
> DEF_HELPER_4(bcdcpsgn, i32, avr, avr, avr, i32)
> DEF_HELPER_3(bcdsetsgn, i32, avr, avr, i32)
> DEF_HELPER_4(bcds, i32, avr, avr, avr, i32)
> +DEF_HELPER_4(bcdus, i32, avr, avr, avr, i32)
>
> DEF_HELPER_2(xsadddp, void, env, i32)
> DEF_HELPER_2(xssubdp, void, env, i32)
> diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
> index b25c020..4b5eea1 100644
> --- a/target-ppc/int_helper.c
> +++ b/target-ppc/int_helper.c
> @@ -3081,6 +3081,49 @@ uint32_t helper_bcds(ppc_avr_t *r, ppc_avr_t *a,
> ppc_avr_t *b, uint32_t ps)
> return cr;
> }
>
> +uint32_t helper_bcdus(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t ps)
> +{
> + int cr;
> + int i;
> + int invalid = 0;
> + bool ox_flag = false;
> + ppc_avr_t ret = *b;
> +
> +#if defined(HOST_WORDS_BIGENDIAN)
> + int upper = ARRAY_SIZE(a->s32) - 1;
> +#else
> + int upper = 0;
> +#endif
Retrieving the shift in terms of s32 elements, seems very odd when the
architecture defines the shift argument in terms of byte elements of
the vector.
> +
> + for (i = 0; i < 32; i++) {
> + bcd_get_digit(b, i, &invalid);
> +
> + if (unlikely(invalid)) {
> + return CRF_SO;
> + }
> + }
> +
> + if (a->s32[upper] >= 32) {
> + ox_flag = true;
> + ret.u64[LO_IDX] = ret.u64[HI_IDX] = 0;
> + } else if (a->s32[upper] <= -32) {
> + ret.u64[LO_IDX] = ret.u64[HI_IDX] = 0;
> + } else if (a->s32[upper] > 0) {
> + i = a->s32[upper] & 31;
> + ulshift(&ret.u64[LO_IDX], &ret.u64[HI_IDX], i * 4, &ox_flag);
> + } else {
> + i = (-a->s32[upper]) & 31;
> + urshift(&ret.u64[LO_IDX], &ret.u64[HI_IDX], i * 4);
> + }
> +
> + cr = bcd_cmp_zero(r);
> + if (unlikely(ox_flag)) {
> + cr |= CRF_SO;
> + }
> +
> + return cr;
> +}
> +
> void helper_vsbox(ppc_avr_t *r, ppc_avr_t *a)
> {
> int i;
> diff --git a/target-ppc/translate/vmx-impl.inc.c
> b/target-ppc/translate/vmx-impl.inc.c
> index 84ebb7e..fc54881 100644
> --- a/target-ppc/translate/vmx-impl.inc.c
> +++ b/target-ppc/translate/vmx-impl.inc.c
> @@ -1017,6 +1017,7 @@ GEN_BCD2(bcdctsq)
> GEN_BCD2(bcdsetsgn)
> GEN_BCD(bcdcpsgn);
> GEN_BCD(bcds);
> +GEN_BCD(bcdus);
>
> static void gen_xpnd04_1(DisasContext *ctx)
> {
> @@ -1093,6 +1094,8 @@ GEN_VXFORM_DUAL(vaddshs, PPC_ALTIVEC, PPC_NONE, \
> bcdcpsgn, PPC_NONE, PPC2_ISA300)
> GEN_VXFORM_DUAL(vsubudm, PPC2_ALTIVEC_207, PPC_NONE, \
> bcds, PPC_NONE, PPC2_ISA300)
> +GEN_VXFORM_DUAL(vsubuwm, PPC_ALTIVEC, PPC_NONE, \
> + bcdus, PPC_NONE, PPC2_ISA300)
>
> static void gen_vsbox(DisasContext *ctx)
> {
> diff --git a/target-ppc/translate/vmx-ops.inc.c
> b/target-ppc/translate/vmx-ops.inc.c
> index 7b4b009..cdd3abe 100644
> --- a/target-ppc/translate/vmx-ops.inc.c
> +++ b/target-ppc/translate/vmx-ops.inc.c
> @@ -61,7 +61,7 @@ GEN_VXFORM(vadduwm, 0, 2),
> GEN_VXFORM_207(vaddudm, 0, 3),
> GEN_VXFORM_DUAL(vsububm, bcdadd, 0, 16, PPC_ALTIVEC, PPC_NONE),
> GEN_VXFORM_DUAL(vsubuhm, bcdsub, 0, 17, PPC_ALTIVEC, PPC_NONE),
> -GEN_VXFORM(vsubuwm, 0, 18),
> +GEN_VXFORM_DUAL(vsubuwm, bcdus, 0, 18, PPC_ALTIVEC, PPC2_ISA300),
> GEN_VXFORM_DUAL(vsubudm, bcds, 0, 19, PPC2_ALTIVEC_207, PPC2_ISA300),
> GEN_VXFORM_300(bcds, 0, 27),
> GEN_VXFORM(vmaxub, 1, 0),
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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