This series contains 6 new instructions for POWER9 ISA3.0
Vector Extract Left/Right Indexed
Changelog:
v1:
* Rebase
* Implement vextub[r,l]x using int128_rshift
v0:
* Change dq/ds-form decoding for primary opcode 0x3D
* Rename CR Field defines, as at every place it was
using bit shifts.
* Use symbolic constants in xscmp*
* Fix bug in exception handling for QNaN
* Define EXTRACT128 within CONFIG_INT128
Patches
=======
01:
vextublx: Vector Extract Unsigned Byte Left
vextuhlx: Vector Extract Unsigned Halfword Left
vextuwlx: Vector Extract Unsigned Word Left
02:
vextubrx: Vector Extract Unsigned Byte Right-Indexed
vextuhrx: Vector Extract Unsigned Halfword Right-Indexed
vextuwrx: Vector Extract Unsigned Word Right-Indexed
Avinesh Kumar (1):
target-ppc: add vextu[bhw]lx instructions
Hariharan T.S (1):
target-ppc: add vextu[bhw]rx instructions
target-ppc/helper.h | 6 +++
target-ppc/int_helper.c | 95 +++++++++++++++++++++++++++++++++++++
target-ppc/translate/vmx-impl.inc.c | 23 +++++++++
target-ppc/translate/vmx-ops.inc.c | 8 +++-
4 files changed, 130 insertions(+), 2 deletions(-)
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2.7.4
