On Tue, Nov 22, 2016 at 12:11:21PM +0800, Jason Wang wrote: > Yes, that's the interesting point. The fault is not guaranteed but > conditional. And we have similar issue for IEC. > > So in conclusion (since I can't find a hardware IOMMU that have CM set): > > 1) If we don't cache fault conditions, we are still in question that whether > it was spec compatible. > 2) If we do cache fault conditions, we are 100% sure it was spec compatible. > > Consider 2) is not complicated, we'd better do it I believe? > > Thanks
IMO it's just a confusing jargon used by intel architects. CM is there exactly so you can shadow the tables, but they were trying hard to use wording that also makes sense to hardware/driver developers. Nothing to worry about. -- MST
