On Thu, Nov 17, 2016 at 02:49:48PM +0100, Vladimir Svoboda wrote: > The server architecture (BOOK3S) specifies that any instruction that > sets MSR:PR will also set MSR:EE, IR and DR. > However there is no such behavior specification for the embedded > architecture (BOOK3E). > > Signed-off-by: Vladimir Svoboda <ze.v...@gmail.com>
Applied to ppc-for-2.8, thanks.
> ---
> target-ppc/helper_regs.h | 11 +++++++----
> 1 file changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/target-ppc/helper_regs.h b/target-ppc/helper_regs.h
> index bb9ce60..6213816 100644
> --- a/target-ppc/helper_regs.h
> +++ b/target-ppc/helper_regs.h
> @@ -131,11 +131,14 @@ static inline int hreg_store_msr(CPUPPCState *env,
> target_ulong value,
> }
> /* If PR=1 then EE, IR and DR must be 1
> *
> - * Note: We only enforce this on 64-bit processors. It appears that
> - * 32-bit implementations supports PR=1 and EE/DR/IR=0 and MacOS
> - * exploits it.
> + * Note: We only enforce this on 64-bit server processors.
> + * It appears that:
> + * - 32-bit implementations supports PR=1 and EE/DR/IR=0 and MacOS
> + * exploits it.
> + * - 64-bit embedded implementations do not need any operation to be
> + * performed when PR is set.
> */
> - if ((env->insns_flags & PPC_64B) && ((value >> MSR_PR) & 1)) {
> + if ((env->insns_flags & PPC_SEGMENT_64B) && ((value >> MSR_PR) & 1)) {
> value |= (1 << MSR_EE) | (1 << MSR_DR) | (1 << MSR_IR);
> }
> #endif
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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