On Sun, Oct 30, 2016 at 08:44:54AM +0530, Nikunj A Dadhania wrote: > This series contains 7 new instructions for POWER9 ISA3.0 > Vector Rotate Left Dword > Vector Rotate Left Word > Vector Parity Byte
Applied to ppc-for-2.8.
>
> Changelog:
> v2:
> * added internal.h with MASK definition (David/Richard)
> * simplified vparity without recursion (Richard)
>
> v1:
> * Simplify extract routines (Richard)
> * Added ror/rol fix (Richard)
> * Added vector parity and vector compare instructions
>
> v0:
> * Use extract32 and extract64 helper (Richard)
> * Use rol32 and rol64 helper (Richard)
>
> Patches:
> 01:
> Fix ror[8,16,32,64] and rol[8,16,32,64]
> 02:
> vrldmi: Vector Rotate Left Dword then Mask Insert
> vrlwmi: Vector Rotate Left Word then Mask Insert
> 03:
> vrldnm: Vector Rotate Left Doubleword then AND with Mask
> vrlwnm: Vector Rotate Left Word then AND with Mask
> 04:
> vprtybw: Vector Parity Byte Word
> vprtybd: Vector Parity Byte Double Word
> vprtybq: Vector Parity Byte Quad Word
>
> Ankit Kumar (1):
> target-ppc: add vprtyb[w/d/q] instructions
>
> Bharata B Rao (1):
> target-ppc: add vrldnm and vrlwnm instructions
>
> Gautham R. Shenoy (1):
> target-ppc: add vrldnmi and vrlwmi instructions
>
> Nikunj A Dadhania (1):
> bitops: fix rol/ror when shift is zero
>
> disas/ppc.c | 4 +++
> include/qemu/bitops.h | 16 +++++-----
> target-ppc/helper.h | 7 +++++
> target-ppc/int_helper.c | 63
> +++++++++++++++++++++++++++++++++++++
> target-ppc/internal.h | 50 +++++++++++++++++++++++++++++
> target-ppc/translate.c | 29 +----------------
> target-ppc/translate/vmx-impl.inc.c | 15 +++++++++
> target-ppc/translate/vmx-ops.inc.c | 12 ++++---
> 8 files changed, 156 insertions(+), 40 deletions(-)
> create mode 100644 target-ppc/internal.h
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
signature.asc
Description: PGP signature
