Le 29/10/2016 à 00:39, Laurent Vivier a écrit :
> Update helper to set the throwing location in case of div-by-0.
> Cleanup divX.w and add quad word variants of divX.l.
>
> Signed-off-by: Laurent Vivier <laur...@vivier.eu>
> ---
> linux-user/main.c | 7 +++
> target-m68k/cpu.h | 4 --
> target-m68k/helper.h | 6 +-
> target-m68k/op_helper.c | 102 ++++++++++++++++++++++++--------
> target-m68k/qregs.def | 2 -
> target-m68k/translate.c | 150
> ++++++++++++++++++++++++++++++++++++++----------
> 6 files changed, 208 insertions(+), 63 deletions(-)
>
...
> + quot = tcg_temp_new();
> + rem = tcg_temp_new();
> + tcg_gen_extr_i64_i32(quot, rem, t64);
> + tcg_temp_free_i64(t64);
> +
> + /* on overflow, operands are unaffected,
> + * Z and N flags are undefined, C is always 0
> + * If Dq and Dr are the same, the quotient is returned.
> + * therefore we set Dq last.
> + */
> + if (m68k_feature(s->env, M68K_FEATURE_CF_ISA_A)) {
> + /* divs.l <EA>, Dq 32/32 -> 32q */
> + if (REG(ext, 0) == REG(ext, 12)) {
> + tcg_gen_movcond_i32(TCG_COND_EQ, DREG(ext, 12),
> + QREG_CC_V, QREG_CC_C /* zero */,
> + quot, DREG(ext, 12)); /* quot */
> + } else {
> + tcg_gen_movcond_i32(TCG_COND_EQ, DREG(ext, 0),
> + QREG_CC_V, QREG_CC_C /* zero */,
> + rem, DREG(ext, 0)); /* rem */
> + }
> } else {
> - /* rem */
> - tcg_gen_mov_i32 (reg, QREG_DIV2);
> + /* divs.l <EA>, Dq 32/32 -> 32q */
> + /* divsl.l <EA>, Dr:Dq 32/32 -> 32r:32q */
> + tcg_gen_movcond_i32(TCG_COND_EQ, DREG(ext, 0),
> + QREG_CC_V, QREG_CC_C /* zero */,
> + rem, DREG(ext, 0)); /* rem */
> + tcg_gen_movcond_i32(TCG_COND_EQ, DREG(ext, 12),
> + QREG_CC_V, QREG_CC_C /* zero */,
> + quot, DREG(ext, 12)); /* quot */
> }
> +
I forget to free "rem" and "quot" here: send a v2...
Laurent
