On Fri, Oct 14, 2016 at 10:07:53AM +0200, Cédric Le Goater wrote:
> >> --- a/hw/ppc/pnv.c
> >> +++ b/hw/ppc/pnv.c
> >> @@ -318,15 +318,24 @@ static void ppc_powernv_reset(void)
> >> * have a CPLD that will collect the SerIRQ and shoot them as a
> >> * single level interrupt to the P8 chip. So let's setup a hook
> >> * for doing just that.
> >> - *
> >> - * Note: The actual interrupt input isn't emulated yet, this will
> >> - * come with the PSI bridge model.
> >> */
> >> static void pnv_lpc_isa_irq_handler_cpld(void *opaque, int n, int level)
> >> {
> >> - /* We don't yet emulate the PSI bridge which provides the external
> >> - * interrupt, so just drop interrupts on the floor
> >> - */
> >> + static uint32_t irqstate;
> >
> > Hmm.. static local with important state? That it's not clear whether
> > it should be per-chip or not?
> >
> > I'm not averse to hacks for early bringup, but it should at least have
> > a FIXME comment on it.
>
> yes. I will see if I can make a "irq_cpld' attribute of the chip instead.
> It should be cleaner.
Wouldn't it be in the machine, not the chip? IIUC there's only one
CPLD on the whole board.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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