On Wed, Oct 12, 2016 at 03:29:45PM +1100, David Gibson wrote: > The current way we organize the IO windows into PCI space for the > pseries machine type has several problems. > > - It makes it difficult to create very large MMIO spaces which is > necessary for certain PCI devices with very large BARs. This > problem has been known for a while. > > - More recently we discovered a more serious problem: it prevents > more than 1TiB of RAM being added to a pseries guest. > > - It doesn't make very efficient use of address space. > > Fixing this is complicated by keeping migration from old versionss > working and working out what things belong on which side of the > abstraction barrier between the machine type and the host bridge > device. > > This series addresses all these problems. Patches 1-3/7 perform > preliminary cleanups to the spapr specific PCI test code, which we'll > need to get the tests working with the changed implementation. 4-5/7 > represent a minimal fix for the most serious problem (the 1 TiB limit) > - once polished, I'll consider submiting these for the stable branch. > 6-7/7 complete a more comprehensive fix.
Sorry, realised I stupidly left a debug fprintf in there, and also got
one of the recipient emails wrong. New spin coming momentarily.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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