On Thu, Oct 06, 2016 at 05:36:32PM +0200, Paolo Bonzini wrote: > > > On 06/10/2016 16:11, Greg Kurz wrote: > > FWIW, Cedric had another proposal which apparently went unnoticed: > > > > <fc24ad74-da26-a713-9312-a2c2d07fb...@kaod.org> > > > > The idea is to add an optional endianness argument to the read*/write* > > commands in the qtest protocol: > > - libqtest then provides explicit _le and _be APIs > > - no extra byteswap is performed on the test program side: qtest > > actually handles that and does exactly 1 or 0 byteswap. > > - it does not use memread/memwrite > > - the current 'guest native' API where qtest tswaps is preserved > > > > No, this is a worse idea, because the right place to do the swap is in > the "program" (libqtest) not in the "CPU" (QEMU).
Hrm.. I guess that makes sense from an x86 perspective when
load/stores always operate in LE. Not so much for something like
Power where the CPU can perform both LE and BE load/stores trivially.
You can select with CPU mode combined with which instruction form you
use. e.g. the always-LE writel() on a BE Power kernel is a single
byte-reversed store instruction[0]. there's no "swap" as such, and the
swapped value never appears in a register. I'm not certain if gcc is
smart enough to translate foo->bar = cpu_to_le32(val) into a
byte-reversed store, but it might be.
The value passed across the pipe to readw etc. is text, so it has no
endianness, just as a value in a cpu register has no endianness. To
me it makes perfect sense to tell the qtest "cpu" which endianness of
load/store you want it to do with that.
[0] Well, ok, there's a memory barrier too, so it's not quite 1
instruction.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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