On 09/26/2016 05:56 AM, Sagar Karandikar wrote: > Only files that live outside of target-riscv and hw/riscv, excluding > configure and default-configs changes. > > Signed-off-by: Sagar Karandikar <sag...@eecs.berkeley.edu> > ---
> +++ b/qapi-schema.json
> @@ -832,7 +832,7 @@
> # Since: 2.6
> ##
> { 'enum': 'CpuInfoArch',
> - 'data': ['x86', 'sparc', 'ppc', 'mips', 'tricore', 'other' ] }
> + 'data': ['x86', 'sparc', 'ppc', 'mips', 'tricore', 'riscv', 'other' ] }
Missing documentation that 'riscv' was added in 2.8. Enums aren't
always the best example, but BlockdevDriver in qapi/block-core.json
shows a good way of how to do it.
> @@ -927,6 +928,17 @@
> { 'struct': 'CpuInfoTricore', 'data': { 'PC': 'int' } }
>
> ##
> +# @CpuInfoRISCV:
> +#
> +# Additional information about a virtual RISCV CPU
> +#
> +# @PC: the instruction pointer
> +#
> +# Since 2.6
s/2.6/2.8/
And can we please NOT abuse the fact that CpuInfo is already whitelisted
for allowing non-lowercase names?...
> +##
> +{ 'struct': 'CpuInfoRISCV', 'data': { 'pc': 'int' } }
Oh, you already did. Your documentation is wrong, then, as it documents
'PC' while the code uses 'pc'.
--
Eric Blake eblake redhat com +1-919-301-3266
Libvirt virtualization library http://libvirt.org
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