Delete explicit PCI host bridge byte swaps, adjust MMIO registrations
to insert a byte swapping IO type.
Signed-off-by: Blue Swirl <blauwir...@gmail.com>
---
hw/apb_pci.c | 12 ++++++------
hw/dec_pci.c | 6 ++++--
hw/grackle_pci.c | 6 ++++--
hw/ppc4xx_pci.c | 21 ++++++++-------------
hw/prep_pci.c | 5 +----
hw/unin_pci.c | 18 ++++++++++++------
6 files changed, 35 insertions(+), 33 deletions(-)
diff --git a/hw/apb_pci.c b/hw/apb_pci.c
index 71c5e75..cbc11ab 100644
--- a/hw/apb_pci.c
+++ b/hw/apb_pci.c
@@ -191,7 +191,6 @@ static void apb_pci_config_write(ReadWriteHandler
*h, pcibus_t addr,
{
APBState *s = container_of(h, APBState, pci_config_handler);
- val = qemu_bswap_len(val, size);
APB_DPRINTF("%s: addr " TARGET_FMT_lx " val %x\n", __func__, addr, val);
pci_data_write(s->bus, addr, val, size);
}
@@ -203,7 +202,6 @@ static uint32_t
apb_pci_config_read(ReadWriteHandler *h, pcibus_t addr,
APBState *s = container_of(h, APBState, pci_config_handler);
ret = pci_data_read(s->bus, addr, size);
- ret = qemu_bswap_len(ret, size);
APB_DPRINTF("%s: addr " TARGET_FMT_lx " -> %x\n", __func__, addr, ret);
return ret;
}
@@ -217,13 +215,13 @@ static void pci_apb_iowriteb (void *opaque,
target_phys_addr_t addr,
static void pci_apb_iowritew (void *opaque, target_phys_addr_t addr,
uint32_t val)
{
- cpu_outw(addr & IOPORTS_MASK, bswap16(val));
+ cpu_outw(addr & IOPORTS_MASK, val);
}
static void pci_apb_iowritel (void *opaque, target_phys_addr_t addr,
uint32_t val)
{
- cpu_outl(addr & IOPORTS_MASK, bswap32(val));
+ cpu_outl(addr & IOPORTS_MASK, val);
}
static uint32_t pci_apb_ioreadb (void *opaque, target_phys_addr_t addr)
@@ -238,7 +236,7 @@ static uint32_t pci_apb_ioreadw (void *opaque,
target_phys_addr_t addr)
{
uint32_t val;
- val = bswap16(cpu_inw(addr & IOPORTS_MASK));
+ val = cpu_inw(addr & IOPORTS_MASK);
return val;
}
@@ -246,7 +244,7 @@ static uint32_t pci_apb_ioreadl (void *opaque,
target_phys_addr_t addr)
{
uint32_t val;
- val = bswap32(cpu_inl(addr & IOPORTS_MASK));
+ val = cpu_inl(addr & IOPORTS_MASK);
return val;
}
@@ -425,12 +423,14 @@ static int pci_pbm_init_device(SysBusDevice *dev)
s->pci_config_handler.write = apb_pci_config_write;
pci_config = cpu_register_io_memory_simple(&s->pci_config_handler);
assert(pci_config >= 0);
+ pci_config = cpu_physical_memory_toggle_bswap(pci_config);
/* at region 1 */
sysbus_init_mmio(dev, 0x1000000ULL, pci_config);
/* pci_ioport */
pci_ioport = cpu_register_io_memory(pci_apb_ioread,
pci_apb_iowrite, s);
+ pci_ioport = cpu_physical_memory_toggle_bswap(pci_ioport);
/* at region 2 */
sysbus_init_mmio(dev, 0x10000ULL, pci_ioport);
diff --git a/hw/dec_pci.c b/hw/dec_pci.c
index ee49d5a..f6b5a0c 100644
--- a/hw/dec_pci.c
+++ b/hw/dec_pci.c
@@ -69,8 +69,10 @@ static int pci_dec_21154_init_device(SysBusDevice *dev)
s = FROM_SYSBUS(DECState, dev);
- pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 1);
- pci_mem_data = pci_host_data_register_mmio(&s->host_state, 1);
+ pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 0);
+ pci_mem_data = pci_host_data_register_mmio(&s->host_state, 0);
+ pci_mem_config = cpu_physical_memory_toggle_bswap(pci_mem_config);
+ pci_mem_data = cpu_physical_memory_toggle_bswap(pci_mem_data);
sysbus_init_mmio(dev, 0x1000, pci_mem_config);
sysbus_init_mmio(dev, 0x1000, pci_mem_data);
return 0;
diff --git a/hw/grackle_pci.c b/hw/grackle_pci.c
index 91c755f..ae69c21 100644
--- a/hw/grackle_pci.c
+++ b/hw/grackle_pci.c
@@ -108,8 +108,10 @@ static int pci_grackle_init_device(SysBusDevice *dev)
s = FROM_SYSBUS(GrackleState, dev);
- pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 1);
- pci_mem_data = pci_host_data_register_mmio(&s->host_state, 1);
+ pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 0);
+ pci_mem_config = cpu_physical_memory_toggle_bswap(pci_mem_config);
+ pci_mem_data = pci_host_data_register_mmio(&s->host_state, 0);
+ pci_mem_data = cpu_physical_memory_toggle_bswap(pci_mem_data);
sysbus_init_mmio(dev, 0x1000, pci_mem_config);
sysbus_init_mmio(dev, 0x1000, pci_mem_data);
diff --git a/hw/ppc4xx_pci.c b/hw/ppc4xx_pci.c
index 6e437e7..f7335b7 100644
--- a/hw/ppc4xx_pci.c
+++ b/hw/ppc4xx_pci.c
@@ -102,10 +102,6 @@ static void pci4xx_cfgaddr_writel(void *opaque,
target_phys_addr_t addr,
{
PPC4xxPCIState *ppc4xx_pci = opaque;
-#ifdef TARGET_WORDS_BIGENDIAN
- value = bswap32(value);
-#endif
-
ppc4xx_pci->pci_state.config_reg = value & ~0x3;
}
@@ -120,10 +116,6 @@ static void ppc4xx_pci_reg_write4(void *opaque,
target_phys_addr_t offset,
{
struct PPC4xxPCIState *pci = opaque;
-#ifdef TARGET_WORDS_BIGENDIAN
- value = bswap32(value);
-#endif
-
/* We ignore all target attempts at PCI configuration, effectively
* assuming a bidirectional 1:1 mapping of PLB and PCI space. */
@@ -251,10 +243,6 @@ static uint32_t ppc4xx_pci_reg_read4(void
*opaque, target_phys_addr_t offset)
value = 0;
}
-#ifdef TARGET_WORDS_BIGENDIAN
- value = bswap32(value);
-#endif
-
return value;
}
@@ -375,18 +363,25 @@ PCIBus *ppc4xx_pci_init(CPUState *env, qemu_irq
pci_irqs[4],
pci4xx_cfgaddr_write, controller);
if (index < 0)
goto free;
+#ifdef TARGET_WORDS_BIGENDIAN
+ index = cpu_physical_memory_toggle_bswap(index);
+#endif
cpu_register_physical_memory(config_space + PCIC0_CFGADDR, 4, index);
/* CFGDATA */
- index = pci_host_data_register_mmio(&controller->pci_state, 1);
+ index = pci_host_data_register_mmio(&controller->pci_state, 0);
if (index < 0)
goto free;
+ index = cpu_physical_memory_toggle_bswap(index);
cpu_register_physical_memory(config_space + PCIC0_CFGDATA, 4, index);
/* Internal registers */
index = cpu_register_io_memory(pci_reg_read, pci_reg_write, controller);
if (index < 0)
goto free;
+#ifdef TARGET_WORDS_BIGENDIAN
+ index = cpu_physical_memory_toggle_bswap(index);
+#endif
cpu_register_physical_memory(registers, PCI_REG_SIZE, index);
qemu_register_reset(ppc4xx_pci_reset, controller);
diff --git a/hw/prep_pci.c b/hw/prep_pci.c
index 0c2afe9..16c677c 100644
--- a/hw/prep_pci.c
+++ b/hw/prep_pci.c
@@ -49,14 +49,12 @@ static void PPC_PCIIO_writeb (void *opaque,
target_phys_addr_t addr, uint32_t va
static void PPC_PCIIO_writew (void *opaque, target_phys_addr_t addr,
uint32_t val)
{
PREPPCIState *s = opaque;
- val = bswap16(val);
pci_data_write(s->bus, PPC_PCIIO_config(addr), val, 2);
}
static void PPC_PCIIO_writel (void *opaque, target_phys_addr_t addr,
uint32_t val)
{
PREPPCIState *s = opaque;
- val = bswap32(val);
pci_data_write(s->bus, PPC_PCIIO_config(addr), val, 4);
}
@@ -73,7 +71,6 @@ static uint32_t PPC_PCIIO_readw (void *opaque,
target_phys_addr_t addr)
PREPPCIState *s = opaque;
uint32_t val;
val = pci_data_read(s->bus, PPC_PCIIO_config(addr), 2);
- val = bswap16(val);
return val;
}
@@ -82,7 +79,6 @@ static uint32_t PPC_PCIIO_readl (void *opaque,
target_phys_addr_t addr)
PREPPCIState *s = opaque;
uint32_t val;
val = pci_data_read(s->bus, PPC_PCIIO_config(addr), 4);
- val = bswap32(val);
return val;
}
@@ -126,6 +122,7 @@ PCIBus *pci_prep_init(qemu_irq *pic)
PPC_io_memory = cpu_register_io_memory(PPC_PCIIO_read,
PPC_PCIIO_write, s);
+ PPC_io_memory = cpu_physical_memory_toggle_bswap(PPC_io_memory);
cpu_register_physical_memory(0x80800000, 0x00400000, PPC_io_memory);
/* PCI host bridge */
diff --git a/hw/unin_pci.c b/hw/unin_pci.c
index 1310211..6694a00 100644
--- a/hw/unin_pci.c
+++ b/hw/unin_pci.c
@@ -121,7 +121,7 @@ static void unin_data_write(ReadWriteHandler *handler,
pcibus_t addr, uint32_t val, int len)
{
UNINState *s = container_of(handler, UNINState, data_handler);
- val = qemu_bswap_len(val, len);
+
UNIN_DPRINTF("write addr %" FMT_PCIBUS " len %d val %x\n", addr, len, val);
pci_data_write(s->host_state.bus,
unin_get_config_reg(s->host_state.config_reg, addr),
@@ -138,7 +138,6 @@ static uint32_t unin_data_read(ReadWriteHandler *handler,
unin_get_config_reg(s->host_state.config_reg, addr),
len);
UNIN_DPRINTF("read addr %" FMT_PCIBUS " len %d val %x\n", addr, len, val);
- val = qemu_bswap_len(val, len);
return val;
}
@@ -151,10 +150,12 @@ static int pci_unin_main_init_device(SysBusDevice *dev)
/* Uninorth main bus */
s = FROM_SYSBUS(UNINState, dev);
- pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 1);
+ pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 0);
+ pci_mem_config = cpu_physical_memory_toggle_bswap(pci_mem_config);
s->data_handler.read = unin_data_read;
s->data_handler.write = unin_data_write;
pci_mem_data = cpu_register_io_memory_simple(&s->data_handler);
+ pci_mem_data = cpu_physical_memory_toggle_bswap(pci_mem_data);
sysbus_init_mmio(dev, 0x1000, pci_mem_config);
sysbus_init_mmio(dev, 0x1000, pci_mem_data);
@@ -172,10 +173,12 @@ static int pci_u3_agp_init_device(SysBusDevice *dev)
/* Uninorth U3 AGP bus */
s = FROM_SYSBUS(UNINState, dev);
- pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 1);
+ pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 0);
+ pci_mem_config = cpu_physical_memory_toggle_bswap(pci_mem_config);
s->data_handler.read = unin_data_read;
s->data_handler.write = unin_data_write;
pci_mem_data = cpu_register_io_memory_simple(&s->data_handler);
+ pci_mem_data = cpu_physical_memory_toggle_bswap(pci_mem_data);
sysbus_init_mmio(dev, 0x1000, pci_mem_config);
sysbus_init_mmio(dev, 0x1000, pci_mem_data);
@@ -195,7 +198,9 @@ static int pci_unin_agp_init_device(SysBusDevice *dev)
s = FROM_SYSBUS(UNINState, dev);
pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 0);
- pci_mem_data = pci_host_data_register_mmio(&s->host_state, 1);
+ pci_mem_config = cpu_physical_memory_toggle_bswap(pci_mem_config);
+ pci_mem_data = pci_host_data_register_mmio(&s->host_state, 0);
+ pci_mem_data = cpu_physical_memory_toggle_bswap(pci_mem_data);
sysbus_init_mmio(dev, 0x1000, pci_mem_config);
sysbus_init_mmio(dev, 0x1000, pci_mem_data);
return 0;
@@ -210,7 +215,8 @@ static int pci_unin_internal_init_device(SysBusDevice *dev)
s = FROM_SYSBUS(UNINState, dev);
pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 0);
- pci_mem_data = pci_host_data_register_mmio(&s->host_state, 1);
+ pci_mem_data = pci_host_data_register_mmio(&s->host_state, 0);
+ pci_mem_data = cpu_physical_memory_toggle_bswap(pci_mem_data);
sysbus_init_mmio(dev, 0x1000, pci_mem_config);
sysbus_init_mmio(dev, 0x1000, pci_mem_data);
return 0;
--
1.6.2.4
