On Mon, Jul 04, 2016 at 01:33:02PM +1000, Alexey Kardashevskiy wrote: > Each Partitionable Endpoint (IOMMU group) has an address range on a PCI bus > where devices are allowed to do DMA. These ranges are called DMA windows. > By default, there is a single DMA window, 1 or 2GB big, mapped at zero > on a PCI bus. > > PAPR defines a DDW RTAS API which allows pseries guests > querying the hypervisor about DDW support and capabilities (page size mask > for now). A pseries guest may request an additional (to the default) > DMA windows using this RTAS API. > The existing pseries Linux guests request an additional window as big as > the guest RAM and map the entire guest window which effectively creates > direct mapping of the guest memory to a PCI bus. > > This patchset reworks PPC64 IOMMU code and adds necessary structures > to support big windows on pseries. > > This patchset is based on today's upstream sha1 9a48e36 and was tested > with the today's upstream kernel sha1 0b295dd. > > Please comment. Thanks!
I've merged these to ppc-for-2.7.
I had to fix several compile errors. In future please test compiling
for all targets on both 64-bit and 32-bit hosts.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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