From: Benjamin Herrenschmidt <b...@kernel.crashing.org>
This allows us to set the appropriate LPCR bits which will be used
when fixing the exception model for the HV mode.
Signed-off-by: Benjamin Herrenschmidt <b...@kernel.crashing.org>
Reviewed-by: David Gibson <da...@gibson.dropbear.id.au>
[clg: previous commit 26a7f1291bb5 did not include the LPCR setting as
it was not needed at the time, adapted commit log ]
Signed-off-by: Cédric Le Goater <c...@kaod.org>
Signed-off-by: David Gibson <da...@gibson.dropbear.id.au>
---
target-ppc/translate_init.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index c847a3e..db56a39 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -8518,6 +8518,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
void cpu_ppc_set_papr(PowerPCCPU *cpu)
{
CPUPPCState *env = &cpu->env;
+ ppc_spr_t *lpcr = &env->spr_cb[SPR_LPCR];
ppc_spr_t *amor = &env->spr_cb[SPR_AMOR];
/* PAPR always has exception vectors in RAM not ROM. To ensure this,
@@ -8527,6 +8528,19 @@ void cpu_ppc_set_papr(PowerPCCPU *cpu)
*/
env->msr_mask &= ~((1ull << MSR_EP) | MSR_HVB);
+ /* Set emulated LPCR to not send interrupts to hypervisor. Note that
+ * under KVM, the actual HW LPCR will be set differently by KVM itself,
+ * the settings below ensure proper operations with TCG in absence of
+ * a real hypervisor
+ */
+ lpcr->default_value &= ~(LPCR_VPM0 | LPCR_VPM1 | LPCR_ISL | LPCR_KBV);
+ lpcr->default_value |= LPCR_LPES0 | LPCR_LPES1;
+
+ /* We should be followed by a CPU reset but update the active value
+ * just in case...
+ */
+ env->spr[SPR_LPCR] = lpcr->default_value;
+
/* Set a full AMOR so guest can use the AMR as it sees fit */
env->spr[SPR_AMOR] = amor->default_value = 0xffffffffffffffffull;
--
2.5.5
