v3 changes (all patch numbers corresponds to v2):
- patch 1 (-> v3 patch 13)
- move to the end of series [Alex]
- patch 10 (dropped)
- drop this one, since re-worked on IOAPIC support, so we do not
need this any more.
- patch 12 (-> v3 patch 10)
- leverage MSI path for IOAPIC IR [Jan]
- patch 13 (v3 -> patch 9)
- remove vtd_interrupt_remap_msi() declaration by reordering the
functions [mst]
- vtd_generate_msi_message(): init msg using {}, remove FIXME
[mst]
- new patches
- v3 patch 11: introduce ioapic_entry_parse() helper function
- v3 patch 12: add support for kernel-irqchip=split. This needs
more reviews, logically this should enable lots of things:
splitted irqchip, irqfd, vhost, and irqfd support for
passthrough devices (not tested). Please refer to the patch for
more information.
v2 changes:
- patch 1
- rename "int_remap" to "intr" in several places [Marcel]
- remove "Intel" specific words in desc or commit message, prepare
itself with further AMD support [Marcel]
- avoid using object_property_get_bool() [Marcel]
- patch 5
- use PCI bus number 0xff rather than 0xf0 for the IOAPIC scope
definition. (please let me know if anyone knows how I can avoid
user using PCI bus number 0xff... TIA)
- patch 11
- fix comments [Marcel]
- all
- remove intr_supported variable [Marcel]
This patchset provide very basic functionalities for interrupt
remapping (IR) support of the emulated Intel IOMMU device.
By default, IR is disabled to be better compatible with current
QEMU. To enable IR, we can using the following command to boot a
IR-supported VM with virtio-net device with vhost (still do not
support kvm-ioapic, so we need to specify kernel-irqchip={split|off}
here):
$ qemu-system-x86_64 -M q35,iommu=on,intr=on,kernel-irqchip=split \
-enable-kvm -m 1024 \
-netdev tap,id=net0,vhost=on \
-device virtio-net-pci,netdev=user.0 \
-monitor telnet::3333,server,nowait \
/var/lib/libvirt/images/vm1.qcow2
When guest boots, we can verify whether IR enabled by grepping the
dmesg like:
[root@localhost ~]# journalctl -k | grep "DMAR-IR"
Feb 19 11:21:23 localhost.localdomain kernel: DMAR-IR: IOAPIC id 0 under DRHD
base 0xfed90000 IOMMU 0
Feb 19 11:21:23 localhost.localdomain kernel: DMAR-IR: Enabled IRQ remapping in
xapic mode
Currently supported devices:
- Emulated/Splitted irqchip
- Generic PCI Devices
- vhost devices
- pass through device support? Not tested, but suppose it should work.
TODO List:
- kvm-ioapic support (?)
- EIM support
- IR fault reporting
- source-id validation for IRTE
- IRTE cache and better queued invalidation
- migration support (for IOMMU as general?)
- more?
Peter Xu (13):
intel_iommu: allow queued invalidation for IR
intel_iommu: set IR bit for ECAP register
acpi: add DMAR scope definition for root IOAPIC
intel_iommu: define interrupt remap table addr register
intel_iommu: handle interrupt remap enable
intel_iommu: define several structs for IOMMU IR
intel_iommu: provide helper function vtd_get_iommu
intel_iommu: add IR translation faults defines
intel_iommu: Add support for PCI MSI remap
q35: ioapic: add support for emulated IOAPIC IR
ioapic: introduce ioapic_entry_parse() helper
q35: ioapic: add support for split irqchip and irqfd
q35: add "int-remap" flag to enable intr
hw/core/machine.c | 20 +++
hw/i386/acpi-build.c | 24 ++-
hw/i386/intel_iommu.c | 343 +++++++++++++++++++++++++++++++++++++-
hw/i386/intel_iommu_internal.h | 23 +++
hw/i386/pc.c | 3 +
hw/intc/ioapic.c | 116 ++++++++-----
hw/intc/ioapic_common.c | 4 +
hw/pci-host/q35.c | 4 +
include/hw/acpi/acpi-defs.h | 15 ++
include/hw/i386/apic-msidef.h | 1 +
include/hw/i386/intel_iommu.h | 117 +++++++++++++
include/hw/i386/ioapic_internal.h | 6 +
include/hw/i386/pc.h | 4 +
include/hw/pci-host/q35.h | 9 +
14 files changed, 635 insertions(+), 54 deletions(-)
--
2.4.3
