On 03/22/2016 12:14 AM, David Gibson wrote:
> On Mon, Mar 21, 2016 at 01:52:30PM +0100, Cédric Le Goater wrote:
>> Hello,
>>
>> This is a first mini-serie of patches adding support for new ppc SPRs.
>> They were taken from Ben's larger patchset adding the ppc powernv
>> platform and they should already be useful for the pseries guest
>> migration.
>>
>> Initial patches come from :
>>
>> https://github.com/ozbenh/qemu/commits/powernv
>>
>> The changes are mostly due to the rebase on Dave's 2.6 branch:
>>
>> https://github.com/dgibson/qemu/commits/ppc-for-2.6 ppc-for-2.6-20160316
>>
>> A couple more are bisect and checkpatch fixes and finally some patches
>> were merge to reduce the noise.
>
> Applied to ppc-for-2.6, thanks.
Hello David,
I have identified this next serie of prerequisites for PowerNV that should
not need too much discussion. When would be the right time to send them ?
[PATCH 01/77] ppc: Remove MMU_MODEn_SUFFIX definitions
[PATCH 02/77] ppc: Use split I/D mmu modes to avoid flushes on
[PATCH 03/77] ppc: Do some batching of TCG tlb flushes
[PATCH 07/77] ppc: Add a bunch of hypervisor SPRs to Book3s
[PATCH 09/77] ppc: Fix hreg_store_msr() so that non-HV mode cannot
[PATCH 10/77] ppc: Fix rfi/rfid/hrfi/... emulation
[PATCH 12/77] ppc: Better figure out if processor has HV mode
[PATCH 13/77] ppc: tlbie, tlbia and tlbisync are HV only
[PATCH 14/77] ppc: Change 'invalid' bit mask of tlbiel and tlbie
[PATCH 15/77] ppc: Fix sign extension issue in mtmsr(d) emulation
[PATCH 16/77] ppc: Get out of emulation on SMT "OR" ops
[PATCH 17/77] ppc: Add PPC_64H instruction flag to POWER7 and POWER8
The exception model changes are rather invasive but they are complex so
I will keep them for later and I would like to try getting the xics changes
out of the way first. They are a pain to maintain out of the mainline tree.
Could we follow on with xics then ?
Thanks,
C.
