Gibbons, Scott wrote: > My architecture is an Interleaved Multithreading VLIW architecture. One > bundle (packet) executes per processor cycle, rotating between threads (i.e., > thread 0 executes at time 0, thread 1 executes at time 1, then thread 0 > executes at time 2, etc.). Each thread has its own context (including a > program counter). I'm not sure what kind of performance I would get in > translating a single bundle at a time (or maybe I'm misunderstanding). > > I think I'll get basic single-thread operation working first, then attempt > multithreading when I have a spare month or so.
I know of another CPU architecture that has fine-grained hardware threads and has working qemu emulation at a useful performance for debugging kernels, but it's not public as far as I know, and I don't know if it's ok to name it. I don't think it's VLIW, only that it has lots of hardware threads and a working qemu model. -- Jamie
