On 31/03/2016 21:03, Sergey Fedorov wrote: > Looks like we have to ensure all vCPUs are out of translated code when > doing TB patching either doing tb_add_jump() or tb_phys_invalidate(). > Did I missed something?
Almost all TCG targets have naturally aligned instructions, so that's not a problem; we can assume that 32-bit writes are atomic, though perhaps we can change them to atomic_set just to be safe. Only s390 and x86 can have unaligned instructions. For x86 I suppose you can use 1 to 3 byte nops so that the first byte of the jump ends up at ip%4=3. For s390 you can do the same, I don't know the encoding of the canonical nop but an "or 0,0" instruction can do and is 16 bits wide (in this case instructions are 16-bit aligned so you'd want ip%4=2). Paolo
