When IR is enabled for IOMMU, each IOAPIC will belong to a specific
intel IOMMU. This pointer will store the owner of current IOAPIC, which
is always the default IOMMU device.
Signed-off-by: Peter Xu <pet...@redhat.com>
---
hw/intc/ioapic_common.c | 2 ++
include/hw/i386/ioapic_internal.h | 3 +++
2 files changed, 5 insertions(+)
diff --git a/hw/intc/ioapic_common.c b/hw/intc/ioapic_common.c
index 0a48de2..2c25aaa 100644
--- a/hw/intc/ioapic_common.c
+++ b/hw/intc/ioapic_common.c
@@ -136,6 +136,8 @@ static void ioapic_common_realize(DeviceState *dev, Error
**errp)
sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->io_memory);
ioapic_no++;
+
+ s->iommu = vtd_iommu_get();
}
static const VMStateDescription vmstate_ioapic_common = {
diff --git a/include/hw/i386/ioapic_internal.h
b/include/hw/i386/ioapic_internal.h
index 797ed47..41fc282 100644
--- a/include/hw/i386/ioapic_internal.h
+++ b/include/hw/i386/ioapic_internal.h
@@ -25,6 +25,7 @@
#include "hw/hw.h"
#include "exec/memory.h"
#include "hw/sysbus.h"
+#include "hw/i386/intel_iommu.h"
#define MAX_IOAPICS 1
@@ -101,6 +102,8 @@ struct IOAPICCommonState {
uint8_t ioregsel;
uint32_t irr;
uint64_t ioredtbl[IOAPIC_NUM_PINS];
+ /* IOMMU pointer that this IOAPIC belongs. */
+ IntelIOMMUState *iommu;
};
void ioapic_reset_common(DeviceState *dev);
--
2.4.3
