On Thu, Feb 11, 2016 at 07:11:49PM +0000, Peter Maydell wrote:
> Make get_r13_banked() raise an exception at runtime for the
> corner case of SRS from System mode, so that we can UNDEF it;
> this brings us in to line with the ARM ARM's set of permitted
> CONSTRAINED UNPREDICTABLE choices.
Reviewed-by: Edgar E. Iglesias <edgar.igles...@xilinx.com>
>
> Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
> ---
> target-arm/op_helper.c | 8 ++++++++
> target-arm/translate.c | 9 +++++----
> 2 files changed, 13 insertions(+), 4 deletions(-)
>
> diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
> index 05f97a7..8183108 100644
> --- a/target-arm/op_helper.c
> +++ b/target-arm/op_helper.c
> @@ -474,6 +474,14 @@ uint32_t HELPER(get_r13_banked)(CPUARMState *env,
> uint32_t mode)
> #if defined(CONFIG_USER_ONLY)
> g_assert_not_reached();
> #endif
> + if ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_SYS) {
> + /* SRS instruction is UNPREDICTABLE from System mode; we UNDEF.
> + * Other UNPREDICTABLE and UNDEF cases were caught at translate time.
> + */
> + raise_exception(env, EXCP_UDEF, syn_uncategorized(),
> + exception_target_el(env));
> + }
> +
> if ((env->uncached_cpsr & CPSR_M) == mode) {
> return env->regs[13];
> } else {
> diff --git a/target-arm/translate.c b/target-arm/translate.c
> index 7bceb05..e69145d 100644
> --- a/target-arm/translate.c
> +++ b/target-arm/translate.c
> @@ -7590,10 +7590,7 @@ static void gen_srs(DisasContext *s,
> * -- not a valid mode number
> * -- a mode that's at a higher exception level
> * -- Monitor, if we are Non-secure
> - * For the UNPREDICTABLE cases we choose to UNDEF, except that for
> - * "current mode is System" we will write a garbage SPSR.
> - * (This is because we don't have access to our current mode here
> - * and would have to do a runtime check to UNDEF for System.)
> + * For the UNPREDICTABLE cases we choose to UNDEF.
> */
> if (s->current_el == 1 && !s->ns) {
> gen_exception_insn(s, 4, EXCP_UDEF, syn_uncategorized(), 3);
> @@ -7639,6 +7636,9 @@ static void gen_srs(DisasContext *s,
>
> addr = tcg_temp_new_i32();
> tmp = tcg_const_i32(mode);
> + /* get_r13_banked() will raise an exception if called from System mode */
> + gen_set_condexec(s);
> + gen_set_pc_im(s, s->pc - 4);
> gen_helper_get_r13_banked(addr, cpu_env, tmp);
> tcg_temp_free_i32(tmp);
> switch (amode) {
> @@ -7688,6 +7688,7 @@ static void gen_srs(DisasContext *s,
> tcg_temp_free_i32(tmp);
> }
> tcg_temp_free_i32(addr);
> + s->is_jmp = DISAS_UPDATE;
> }
>
> static void disas_arm_insn(DisasContext *s, unsigned int insn)
> --
> 1.9.1
>
