Split out qemu_ld/st_direct with full address components.
Avoid copy from addr_reg to R2 for 64-bit guests.
Signed-off-by: Richard Henderson <r...@twiddle.net>
---
tcg/s390/tcg-target.c | 282 ++++++++++++++++++++++++++-----------------------
1 files changed, 151 insertions(+), 131 deletions(-)
diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c
index 822835b..88b5592 100644
--- a/tcg/s390/tcg-target.c
+++ b/tcg/s390/tcg-target.c
@@ -1094,6 +1094,115 @@ static void tgen_calli(TCGContext *s, tcg_target_long
dest)
}
}
+static void tcg_out_qemu_ld_direct(TCGContext *s, int opc, TCGReg data,
+ TCGReg base, TCGReg index, int disp)
+{
+#ifdef TARGET_WORDS_BIGENDIAN
+ const int bswap = 0;
+#else
+ const int bswap = 1;
+#endif
+ switch (opc) {
+ case LD_UINT8:
+ tcg_out_insn(s, RXY, LLGC, data, base, index, disp);
+ break;
+ case LD_INT8:
+ tcg_out_insn(s, RXY, LGB, data, base, index, disp);
+ break;
+ case LD_UINT16:
+ if (bswap) {
+ /* swapped unsigned halfword load with upper bits zeroed */
+ tcg_out_insn(s, RXY, LRVH, data, base, index, disp);
+ tgen_ext16u(s, TCG_TYPE_I64, data, data);
+ } else {
+ tcg_out_insn(s, RXY, LLGH, data, base, index, disp);
+ }
+ break;
+ case LD_INT16:
+ if (bswap) {
+ /* swapped sign-extended halfword load */
+ tcg_out_insn(s, RXY, LRVH, data, base, index, disp);
+ tgen_ext16s(s, TCG_TYPE_I64, data, data);
+ } else {
+ tcg_out_insn(s, RXY, LGH, data, base, index, disp);
+ }
+ break;
+ case LD_UINT32:
+ if (bswap) {
+ /* swapped unsigned int load with upper bits zeroed */
+ tcg_out_insn(s, RXY, LRV, data, base, index, disp);
+ tgen_ext32u(s, data, data);
+ } else {
+ tcg_out_insn(s, RXY, LLGF, data, base, index, disp);
+ }
+ break;
+ case LD_INT32:
+ if (bswap) {
+ /* swapped sign-extended int load */
+ tcg_out_insn(s, RXY, LRV, data, base, index, disp);
+ tgen_ext32s(s, data, data);
+ } else {
+ tcg_out_insn(s, RXY, LGF, data, base, index, disp);
+ }
+ break;
+ case LD_UINT64:
+ if (bswap) {
+ tcg_out_insn(s, RXY, LRVG, data, base, index, disp);
+ } else {
+ tcg_out_insn(s, RXY, LG, data, base, index, disp);
+ }
+ break;
+ default:
+ tcg_abort();
+ }
+}
+
+static void tcg_out_qemu_st_direct(TCGContext *s, int opc, TCGReg data,
+ TCGReg base, TCGReg index, int disp)
+{
+#ifdef TARGET_WORDS_BIGENDIAN
+ const int bswap = 0;
+#else
+ const int bswap = 1;
+#endif
+ switch (opc) {
+ case LD_UINT8:
+ if (disp >= 0 && disp < 0x1000) {
+ tcg_out_insn(s, RX, STC, data, base, index, disp);
+ } else {
+ tcg_out_insn(s, RXY, STCY, data, base, index, disp);
+ }
+ break;
+ case LD_UINT16:
+ if (bswap) {
+ tcg_out_insn(s, RXY, STRVH, data, base, index, disp);
+ } else if (disp >= 0 && disp < 0x1000) {
+ tcg_out_insn(s, RX, STH, data, base, index, disp);
+ } else {
+ tcg_out_insn(s, RXY, STHY, data, base, index, disp);
+ }
+ break;
+ case LD_UINT32:
+ if (bswap) {
+ tcg_out_insn(s, RXY, STRV, data, base, index, disp);
+ } else if (disp >= 0 && disp < 0x1000) {
+ tcg_out_insn(s, RX, ST, data, base, index, disp);
+ } else {
+ tcg_out_insn(s, RXY, STY, data, base, index, disp);
+ }
+ break;
+ case LD_UINT64:
+ if (bswap) {
+ tcg_out_insn(s, RXY, STRVG, data, base, index, disp);
+ } else {
+ tcg_out_insn(s, RXY, STG, data, base, index, disp);
+ }
+ break;
+ default:
+ tcg_abort();
+ }
+}
+
#if defined(CONFIG_SOFTMMU)
static void tgen64_andi_tmp(TCGContext *s, TCGReg dest, tcg_target_ulong val)
{
@@ -1105,13 +1214,13 @@ static void tgen64_andi_tmp(TCGContext *s, TCGReg dest,
tcg_target_ulong val)
}
}
-static void tcg_prepare_qemu_ldst(TCGContext* s, int data_reg, int addr_reg,
- int mem_index, int opc,
+static void tcg_prepare_qemu_ldst(TCGContext* s, TCGReg data_reg,
+ TCGReg addr_reg, int mem_index, int opc,
uint16_t **label2_ptr_p, int is_store)
- {
- int arg0 = TCG_REG_R2;
- int arg1 = TCG_REG_R3;
- int arg2 = TCG_REG_R4;
+{
+ const TCGReg arg0 = TCG_REG_R2;
+ const TCGReg arg1 = TCG_REG_R3;
+ const TCGReg arg2 = TCG_REG_R4;
int s_bits;
uint16_t *label1_ptr;
@@ -1148,18 +1257,18 @@ static void tcg_prepare_qemu_ldst(TCGContext* s, int
data_reg, int addr_reg,
tcg_out_insn(s, RXY, CG, arg0, arg1, 0, 0);
- label1_ptr = (uint16_t*)s->code_ptr;
-
- /* je label1 (offset will be patched in later) */
- tcg_out_insn(s, RI, BRC, S390_CC_EQ, 0);
-
- /* call load/store helper */
#if TARGET_LONG_BITS == 32
tgen_ext32u(s, arg0, addr_reg);
#else
tcg_out_mov(s, arg0, addr_reg);
#endif
+ label1_ptr = (uint16_t*)s->code_ptr;
+
+ /* je label1 (offset will be patched in later) */
+ tcg_out_insn(s, RI, BRC, S390_CC_EQ, 0);
+
+ /* call load/store helper */
if (is_store) {
tcg_out_mov(s, arg1, data_reg);
tcg_out_movi(s, TCG_TYPE_I32, arg2, mem_index);
@@ -1205,13 +1314,6 @@ static void tcg_prepare_qemu_ldst(TCGContext* s, int
data_reg, int addr_reg,
- offsetof(CPUTLBEntry, addr_read));
}
-#if TARGET_LONG_BITS == 32
- /* zero upper 32 bits */
- tcg_out_insn(s, RRE, LLGFR, arg0, addr_reg);
-#else
- /* just copy */
- tcg_out_mov(s, arg0, addr_reg);
-#endif
tcg_out_insn(s, RRE, AGR, arg0, arg1);
}
@@ -1221,150 +1323,68 @@ static void tcg_finish_qemu_ldst(TCGContext* s,
uint16_t *label2_ptr)
*(label2_ptr + 1) = ((unsigned long)s->code_ptr -
(unsigned long)label2_ptr) >> 1;
}
-
-#else /* CONFIG_SOFTMMU */
-
-static void tcg_prepare_qemu_ldst(TCGContext* s, int data_reg, int addr_reg,
- int mem_index, int opc,
- uint16_t **label2_ptr_p, int is_store)
-{
- int arg0 = TCG_REG_R2;
-
- /* user mode, no address translation required */
- if (TARGET_LONG_BITS == 32) {
- tcg_out_insn(s, RRE, LLGFR, arg0, addr_reg);
- } else {
- tcg_out_mov(s, arg0, addr_reg);
- }
-}
-
-static void tcg_finish_qemu_ldst(TCGContext* s, uint16_t *label2_ptr)
-{
-}
-
#endif /* CONFIG_SOFTMMU */
/* load data with address translation (if applicable)
and endianness conversion */
static void tcg_out_qemu_ld(TCGContext* s, const TCGArg* args, int opc)
{
- int addr_reg, data_reg, mem_index;
- int arg0 = TCG_REG_R2;
+ TCGReg addr_reg, data_reg;
+#if defined(CONFIG_SOFTMMU)
+ int mem_index;
uint16_t *label2_ptr;
+#endif
data_reg = *args++;
addr_reg = *args++;
- mem_index = *args;
- dprintf("tcg_out_qemu_ld opc %d data_reg %d addr_reg %d mem_index %d\n"
- opc, data_reg, addr_reg, mem_index);
+#if defined(CONFIG_SOFTMMU)
+ mem_index = *args;
tcg_prepare_qemu_ldst(s, data_reg, addr_reg, mem_index,
opc, &label2_ptr, 0);
- switch (opc) {
- case LD_UINT8:
- tcg_out_insn(s, RXY, LLGC, data_reg, arg0, 0, 0);
- break;
- case LD_INT8:
- tcg_out_insn(s, RXY, LGB, data_reg, arg0, 0, 0);
- break;
- case LD_UINT16:
-#ifdef TARGET_WORDS_BIGENDIAN
- tcg_out_insn(s, RXY, LLGH, data_reg, arg0, 0, 0);
-#else
- /* swapped unsigned halfword load with upper bits zeroed */
- tcg_out_insn(s, RXY, LRVH, data_reg, arg0, 0, 0);
- tgen_ext16u(s, TCG_TYPE_I64, data_reg, data_reg);
-#endif
- break;
- case LD_INT16:
-#ifdef TARGET_WORDS_BIGENDIAN
- tcg_out_insn(s, RXY, LGH, data_reg, arg0, 0, 0);
-#else
- /* swapped sign-extended halfword load */
- tcg_out_insn(s, RXY, LRVH, data_reg, arg0, 0, 0);
- tgen_ext16s(s, TCG_TYPE_I64, data_reg, data_reg);
-#endif
- break;
- case LD_UINT32:
-#ifdef TARGET_WORDS_BIGENDIAN
- tcg_out_insn(s, RXY, LLGF, data_reg, arg0, 0, 0);
-#else
- /* swapped unsigned int load with upper bits zeroed */
- tcg_out_insn(s, RXY, LRV, data_reg, arg0, 0, 0);
- tgen_ext32u(s, data_reg, data_reg);
-#endif
- break;
- case LD_INT32:
-#ifdef TARGET_WORDS_BIGENDIAN
- tcg_out_insn(s, RXY, LGF, data_reg, arg0, 0, 0);
-#else
- /* swapped sign-extended int load */
- tcg_out_insn(s, RXY, LRV, data_reg, arg0, 0, 0);
- tgen_ext32s(s, data_reg, data_reg);
-#endif
- break;
- case LD_UINT64:
-#ifdef TARGET_WORDS_BIGENDIAN
- tcg_out_insn(s, RXY, LG, data_reg, arg0, 0, 0);
-#else
- tcg_out_insn(s, RXY, LRVG, data_reg, arg0, 0, 0);
-#endif
- break;
- default:
- tcg_abort();
- }
+ tcg_out_qemu_ld_direct(s, opc, data_reg, TCG_REG_R2, TCG_REG_NONE, 0);
tcg_finish_qemu_ldst(s, label2_ptr);
+#else
+ if (TARGET_LONG_BITS == 32) {
+ tgen_ext32u(s, TCG_TMP0, addr_reg);
+ tcg_out_qemu_ld_direct(s, opc, data_reg, TCG_TMP0, TCG_REG_NONE, 0);
+ } else {
+ tcg_out_qemu_ld_direct(s, opc, data_reg, addr_reg, TCG_REG_NONE, 0);
+ }
+#endif
}
static void tcg_out_qemu_st(TCGContext* s, const TCGArg* args, int opc)
{
- int addr_reg, data_reg, mem_index;
+ TCGReg addr_reg, data_reg;
+#if defined(CONFIG_SOFTMMU)
+ int mem_index;
uint16_t *label2_ptr;
- int arg0 = TCG_REG_R2;
+#endif
data_reg = *args++;
addr_reg = *args++;
- mem_index = *args;
- dprintf("tcg_out_qemu_st opc %d data_reg %d addr_reg %d mem_index %d\n"
- opc, data_reg, addr_reg, mem_index);
+#if defined(CONFIG_SOFTMMU)
+ mem_index = *args;
tcg_prepare_qemu_ldst(s, data_reg, addr_reg, mem_index,
opc, &label2_ptr, 1);
- switch (opc) {
- case LD_UINT8:
- tcg_out_insn(s, RX, STC, data_reg, arg0, 0, 0);
- break;
- case LD_UINT16:
-#ifdef TARGET_WORDS_BIGENDIAN
- tcg_out_insn(s, RX, STH, data_reg, arg0, 0, 0);
-#else
- tcg_out_insn(s, RXY, STRVH, data_reg, arg0, 0, 0);
-#endif
- break;
- case LD_UINT32:
-#ifdef TARGET_WORDS_BIGENDIAN
- tcg_out_insn(s, RX, ST, data_reg, arg0, 0, 0);
-#else
- tcg_out_insn(s, RXY, STRV, data_reg, arg0, 0, 0);
-#endif
- break;
- case LD_UINT64:
-#ifdef TARGET_WORDS_BIGENDIAN
- tcg_out_insn(s, RXY, STG, data_reg, arg0, 0, 0);
-#else
- tcg_out_insn(s, RXY, STRVG, data_reg, arg0, 0, 0);
-#endif
- break;
- default:
- tcg_abort();
- }
+ tcg_out_qemu_st_direct(s, opc, data_reg, TCG_REG_R2, TCG_REG_NONE, 0);
tcg_finish_qemu_ldst(s, label2_ptr);
+#else
+ if (TARGET_LONG_BITS == 32) {
+ tgen_ext32u(s, TCG_TMP0, addr_reg);
+ tcg_out_qemu_st_direct(s, opc, data_reg, TCG_TMP0, TCG_REG_NONE, 0);
+ } else {
+ tcg_out_qemu_st_direct(s, opc, data_reg, addr_reg, TCG_REG_NONE, 0);
+ }
+#endif
}
static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
--
1.7.0.1
