From: Igor V. Kovalenko <igor.v.kovale...@gmail.com> - address masking for ldqf and stqf insns - address masking for lddf and stdf insns - address masking for translating ASI (Ultrasparc IIi)
Signed-off-by: Igor V. Kovalenko <igor.v.kovale...@gmail.com> --- target-sparc/op_helper.c | 47 ++++++++++++++++++++++++++++++++++++++++++++++ target-sparc/translate.c | 4 ++++ 2 files changed, 51 insertions(+), 0 deletions(-) diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c index ef3504f..f5e153d 100644 --- a/target-sparc/op_helper.c +++ b/target-sparc/op_helper.c @@ -2315,6 +2315,25 @@ void helper_st_asi(target_ulong addr, target_ulong val, int asi, int size) #else /* CONFIG_USER_ONLY */ +/* Ultrasparc IIi translating asi + - note this list is defined by cpu implementation + */ +static inline int is_translating_asi(int asi) +{ + switch (asi) { + case 0x04 ... 0x11: + case 0x18 ... 0x19: + case 0x24 ... 0x2C: + case 0x70 ... 0x73: + case 0x78 ... 0x79: + case 0x80 ... 0xFF: + return 1; + + default: + return 0; + } +} + uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) { uint64_t ret = 0; @@ -2330,7 +2349,12 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign) && !(env->hpstate & HS_PRIV))) raise_exception(TT_PRIV_ACT); + if ((env->pstate & PS_AM) && is_translating_asi(asi)) { + addr &= 0xffffffffULL; + } + helper_check_align(addr, size - 1); + switch (asi) { case 0x82: // Primary no-fault case 0x8a: // Primary no-fault LE @@ -2681,7 +2705,12 @@ void helper_st_asi(target_ulong addr, target_ulong val, int asi, int size) && !(env->hpstate & HS_PRIV))) raise_exception(TT_PRIV_ACT); + if ((env->pstate & PS_AM) && is_translating_asi(asi)) { + addr &= 0xffffffffULL; + } + helper_check_align(addr, size - 1); + /* Convert to little endian */ switch (asi) { case 0x0c: // Nucleus Little Endian (LE) @@ -3056,6 +3085,12 @@ void helper_ldda_asi(target_ulong addr, int asi, int rd) && !(env->hpstate & HS_PRIV))) raise_exception(TT_PRIV_ACT); +#if defined (CONFIG_SPARC64) + if ((env->pstate & PS_AM) && is_translating_asi(asi)) { + addr &= 0xffffffffULL; + } +#endif + switch (asi) { #if !defined(CONFIG_USER_ONLY) case 0x24: // Nucleus quad LDD 128 bit atomic @@ -3102,6 +3137,12 @@ void helper_ldf_asi(target_ulong addr, int asi, int size, int rd) unsigned int i; target_ulong val; +#if defined (CONFIG_SPARC64) + if ((env->pstate & PS_AM) && is_translating_asi(asi)) { + addr &= 0xffffffffULL; + } +#endif + helper_check_align(addr, 3); switch (asi) { case 0xf0: // Block load primary @@ -3144,6 +3185,12 @@ void helper_stf_asi(target_ulong addr, int asi, int size, int rd) unsigned int i; target_ulong val = 0; +#if defined (CONFIG_SPARC64) + if ((env->pstate & PS_AM) && is_translating_asi(asi)) { + addr &= 0xffffffffULL; + } +#endif + helper_check_align(addr, 3); switch (asi) { case 0xe0: // UA2007 Block commit store primary (cache flush) diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 72ca0b4..eff64d4 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -4490,6 +4490,7 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, FLOAT128); r_const = tcg_const_i32(dc->mem_idx); + gen_address_mask(dc, cpu_addr); gen_helper_ldqf(cpu_addr, r_const); tcg_temp_free_i32(r_const); gen_op_store_QT0_fpr(QFPREG(rd)); @@ -4500,6 +4501,7 @@ static void disas_sparc_insn(DisasContext * dc) TCGv_i32 r_const; r_const = tcg_const_i32(dc->mem_idx); + gen_address_mask(dc, cpu_addr); gen_helper_lddf(cpu_addr, r_const); tcg_temp_free_i32(r_const); gen_op_store_DT0_fpr(DFPREG(rd)); @@ -4635,6 +4637,7 @@ static void disas_sparc_insn(DisasContext * dc) CHECK_FPU_FEATURE(dc, FLOAT128); gen_op_load_fpr_QT0(QFPREG(rd)); r_const = tcg_const_i32(dc->mem_idx); + gen_address_mask(dc, cpu_addr); gen_helper_stqf(cpu_addr, r_const); tcg_temp_free_i32(r_const); } @@ -4657,6 +4660,7 @@ static void disas_sparc_insn(DisasContext * dc) gen_op_load_fpr_DT0(DFPREG(rd)); r_const = tcg_const_i32(dc->mem_idx); + gen_address_mask(dc, cpu_addr); gen_helper_stdf(cpu_addr, r_const); tcg_temp_free_i32(r_const); }