On 11/26/2015 07:01 PM, Laszlo Ersek wrote:
Hello Marcel,
[...] if you have ACPI table dumps from within an i440fx
SeaBIOS Linux guest, both from before and after your QEMU patches, and
those dumps are identical, then that's good evidence against
regressions. (I tend to do such acpidump-based comparisons when messing
with ACPI builder code.)
Hi,
OK, there are no functional differences between the SSDT before/after,
however the optimization made in patch "1/3 hw/acpi: merge pxb adjacent memory/IO
ranges"
for pxb-pcies works also for pxb, which is a good thing.
SSDT before (only PXB differences) :
-----------------------------------
Device (PC0A)
{
...
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
...
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
NonCacheable, ReadWrite,
0x00000000, // Granularity
0xFE800000, // Range Minimum
0xFE9FFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00200000, // Length
,, , AddressRangeMemory, TypeStatic)
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
NonCacheable, ReadWrite,
0x00000000, // Granularity
0xFE000000, // Range Minimum
0xFE7FFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00800000, // Length
,, , AddressRangeMemory, TypeStatic)
...
})
}
SSDT after:
------------
Device (PC0A)
{
...
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
...
DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
NonCacheable, ReadWrite,
0x00000000, // Granularity
0xFE000000, // Range Minimum
0xFE9FFFFF, // Range Maximum
0x00000000, // Translation Offset
0x00A00000, // Length
,, , AddressRangeMemory, TypeStatic)
...
})
}
As it can be seen, the optimization works also for PXB by merging the MEM
regions.
Thanks,
Marcel
[...]
