Signed-off-by: Andrey Smetanin <asmeta...@virtuozzo.com> Reviewed-by: Roman Kagan <rka...@virtuozzo.com> CC: Paolo Bonzini <pbonz...@redhat.com> CC: Marcelo Tosatti <mtosa...@redhat.com> CC: Roman Kagan <rka...@virtuozzo.com> CC: Denis V. Lunev <d...@openvz.org> CC: qemu-devel@nongnu.org
--- lib/x86/msr.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/lib/x86/msr.h b/lib/x86/msr.h index 89ed718..4ac9c71 100644 --- a/lib/x86/msr.h +++ b/lib/x86/msr.h @@ -412,6 +412,8 @@ #define HV_X64_MSR_SYNIC_AVAILABLE (1 << 2) #define HV_X64_MSR_SYNTIMER_AVAILABLE (1 << 3) +#define HV_X64_MSR_TIME_REF_COUNT 0x40000020 + /* Define synthetic interrupt controller model specific registers. */ #define HV_X64_MSR_SCONTROL 0x40000080 #define HV_X64_MSR_SVERSION 0x40000081 -- 2.4.3