On Thu, 2015-11-19 at 17:44 +1100, David Gibson wrote: > > > - /* new interrupt handler msr */ > > - new_msr = env->msr & ((target_ulong)1 << MSR_ME); > > + /* new interrupt handler msr preserves existing HV and ME unless > > + * explicitly overriden > > + */ > > + new_msr = env->msr & (((target_ulong)1 << MSR_ME) | MSR_HVB); > > Ouch. The fact that MSR_ME is a bit number, but MSR_HVB is a mask is > certainly confusing, but that's a pre-existing problem.
That shit bit me more than once indeed, but it's a fix for another day. .../... > > > > case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception > > */ > > srr0 = SPR_HSRR0; > > srr1 = SPR_HSRR1; > > new_msr |= (target_ulong)MSR_HVB; > > new_msr |= env->msr & ((target_ulong)1 << MSR_RI); > > + ail = 0; > > Do you need to set ail explicitly here, given the general ail logic below? Not on this indeed. I think that's a remnant of how that patch evolved. We do need to clear unconditionally on other things like machine checks, I'll give that another sweep. Cheers, Ben.
