On 11/17/2015 06:43 PM, Paolo Bonzini wrote:
Hi Richard, it would be nice to have these patches---or at least the XSAVE support---in 2.6. I also have a PKRU implementation for TCG, but currently I'm only implementing RDPKRU/WRPKRU because I would like to build the XSAVE support on top of your patches.
Sure. I'll see about updating that branch this weekend.
Regarding SMM support, there are three ways to go: 1) pester Intel some more so that they disclose the format of the SMM state save area;
They have done so, and relatively well. Section 34.4.1.1 of the software developer's manual (I'm looking at 325462-055, June 2015).
The issue, perhaps, is that the Intel and AMD layouts are totally different. Now, given that we've been using the AMD layout with Intel emulations maybe that means that it really doesn't matter what layout we use, so long as we're self-consistent.
Is there anything besides BIOS code that runs in SMM anyway? Do we have to be compatible with anything besides SeaBIOS in this area?
2) just place BNDCFGS at a random offset that is left as reserved in AMD's manual; 3) do not save BNDCFGS at all since no one uses it anyway. *shrug*
I'm not a fan of 3 simply because it means that one can't experiment with it, since turning it on means either that SMM produces weird results or kernel state gets corrupted.
The holes in the computation of KVM's hflags are probably harmless, but nice to have anyway. Thanks for fixing them. Are there others that I missed?
Not that I saw. r~
