On real hardware it allows temporary thread priority boosts, we don't
do threads and implementing it would be fairly tricky, so we just dummy
it or now.
Signed-off-by: Benjamin Herrenschmidt <b...@kernel.crashing.org>
---
target-ppc/cpu.h | 1 +
target-ppc/translate_init.c | 11 +++++++++++
2 files changed, 12 insertions(+)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 253d04b..334fcfe 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1396,6 +1396,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool
ifetch)
#define SPR_UAMOR (0x09D)
#define SPR_MPC_ICTRL (0x09E)
#define SPR_MPC_BAR (0x09F)
+#define SPR_PSPB (0x09F)
#define SPR_DHDES (0x0B1)
#define SPR_DPDES (0x0B0)
#define SPR_DAWR (0x0B4)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index a178696..b1eba73 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -8224,6 +8224,16 @@ static void gen_spr_power8_book4(CPUPPCState *env)
#endif
}
+static void gen_spr_power8_pspb(CPUPPCState *env)
+{
+#if !defined(CONFIG_USER_ONLY)
+ spr_register(env, SPR_PSPB, "PSPB",
+ SPR_NOACCESS, SPR_NOACCESS,
+ &spr_read_generic, &spr_write_generic,
+ 0);
+#endif
+}
+
static void init_proc_book3s_64(CPUPPCState *env, int version)
{
gen_spr_ne_601(env);
@@ -8278,6 +8288,7 @@ static void init_proc_book3s_64(CPUPPCState *env, int
version)
gen_spr_power8_rpr(env);
gen_spr_power8_dbell(env);
gen_spr_power8_ic(env);
+ gen_spr_power8_pspb(env);
gen_spr_power8_book4(env);
}
if (version < BOOK3S_CPU_POWER8) {
--
2.5.0
