Controls the micropartition prefetch, this is pretty much meaningless
in full emulation (used for priming the caches on real HW).
Signed-off-by: Benjamin Herrenschmidt <b...@kernel.crashing.org>
---
target-ppc/cpu.h | 1 +
target-ppc/translate_init.c | 13 +++++++++++++
2 files changed, 14 insertions(+)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index f7e653b..253d04b 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1399,6 +1399,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool
ifetch)
#define SPR_DHDES (0x0B1)
#define SPR_DPDES (0x0B0)
#define SPR_DAWR (0x0B4)
+#define SPR_MPPR (0x0B8)
#define SPR_RPR (0x0BA)
#define SPR_DAWRX (0x0BC)
#define SPR_HFSCR (0x0BE)
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 4ad2c94..a178696 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -8212,6 +8212,18 @@ static void gen_spr_power8_ic(CPUPPCState *env)
#endif
}
+static void gen_spr_power8_book4(CPUPPCState *env)
+{
+ /* Add a number of P8 book4 registers */
+#if !defined(CONFIG_USER_ONLY)
+ spr_register_hv(env, SPR_MPPR, "MPPR",
+ SPR_NOACCESS, SPR_NOACCESS,
+ &spr_read_generic, SPR_NOACCESS,
+ &spr_read_generic, &spr_write_generic,
+ 0);
+#endif
+}
+
static void init_proc_book3s_64(CPUPPCState *env, int version)
{
gen_spr_ne_601(env);
@@ -8266,6 +8278,7 @@ static void init_proc_book3s_64(CPUPPCState *env, int
version)
gen_spr_power8_rpr(env);
gen_spr_power8_dbell(env);
gen_spr_power8_ic(env);
+ gen_spr_power8_book4(env);
}
if (version < BOOK3S_CPU_POWER8) {
gen_spr_book3s_dbg(env);
--
2.5.0
